Discrete
R2026bBlöcke zur Modellierung zeitdiskreter Systeme, die mit festen Abtastraten aktualisiert werden, z. B. Delay, Discrete-Time Integrator und Discrete Filter
Verwenden Sie Blöcke aus der Bibliothek „Discrete“, um Systeme zu modellieren, die sich nicht kontinuierlich, sondern in festen Abtastintervallen aktualisieren. Sie können Einheitsverzögerungen, zeitdiskrete Integratoren, digitale Filter und Zustandsraummodelle implementieren, die in festgelegten Abtastintervallen ausgeführt werden. Näheres zu Systemen, die sich zeitlich kontinuierlich verändern, finden Sie in der Kontinuierlich-Bibliothek.
Näheres zum Hinzufügen von Blöcken aus dieser Bibliothek zu Ihrem Modell finden Sie unter Add Blocks to Models.
Blöcke
| Conditional Hold | Conditionally hold last value (Seit R2026b) | |
| Delay | Delay input signal by fixed or variable sample periods | |
| Difference | Calculate change in signal over one time step | |
| Discrete Derivative | Zeitdiskrete Ableitung berechnen | |
| Discrete FIR Filter | Model FIR filters | |
| Discrete Filter | Model Infinite Impulse Response (IIR) filters | |
| Discrete PID Controller | Discrete-time or continuous-time PID controller | |
| Discrete PID Controller (2DOF) | Discrete-time or continuous-time two-degree-of-freedom PID controller | |
| Discrete State-Space | Implement discrete state-space system | |
| Discrete Transfer Fcn | Implement discrete transfer function | |
| Discrete Zero-Pole | Model system defined by zeros and poles of discrete transfer function | |
| Discrete-Time Integrator | Perform discrete-time integration or accumulation of signal | |
| Memory | Output input from previous time step | |
| Propagation Delay | Model loop delay, latency, pulse delay (Seit R2022b) | |
| Resettable Delay | Delay input signal by variable sample period and reset with external signal | |
| Tapped Delay | Delay scalar signal multiple sample periods and output all delayed versions | |
| Transfer Fcn First Order | Implement discrete-time first order transfer function | |
| Transfer Fcn Lead or Lag | Implement discrete-time lead or lag compensator | |
| Transfer Fcn Real Zero | Implement discrete-time transfer function that has real zero and no pole | |
| Unit Delay | Signalverzögerung um eine Abtastperiode | |
| Variable Integer Delay | Delay input signal by variable sample period | |
| Zero-Order Hold | Implementierung eines Zero Order Hold-Abtastzeitraums |
Tools
| Library Browser | Find and add blocks to model |
Themen
- Add Blocks to Models
Use the Library Browser and quick insert menu to insert blocks.