Main Content
Transfer Fcn Lead or Lag
Implement discrete-time lead or lag compensator
Libraries:
Simulink /
Discrete
Description
The Transfer Fcn Lead or Lag block implements a discrete-time lead or lag
compensator of the input. The instantaneous gain of the compensator is 1, and the DC
gain is equal to (1-z)/(1-p)
, where z
is the zero
and p
is the pole of the compensator.
The block implements a lead compensator when 0<z<p<1
, and
implements a lag compensator when 0<p<z<1
.
Ports
Input
Output
Parameters
Block Characteristics
Extended Capabilities
Version History
Introduced before R2006a