Conditional Hold

R2026b

Conditionally hold last value

Since R2026b

• 

Conditional Hold block

To add a block to a model, double-click the canvas and start typing the block name. Then, select the block from the list.

Libraries:
Simulink / Discrete

Description

The Conditional Hold block conditionally holds its input signal u based on the value of the condition signal h. If the input is a vector, the block holds all elements of the vector. The Conditional Hold block inherits its sample time from the input signal.

Comparison with Similar Blocks

The Memory, Unit Delay, Zero-Order Hold, and Conditional Hold blocks provide similar functionality but have different capabilities and purposes.

This table shows recommended usage for each block.

Block	Purpose	Reference Examples
Unit Delay	Implement a delay using a discrete sample time that you specify. The block accepts and outputs signals with a discrete sample time.	Engine Timing Model with Closed Loop Control (Compression subsystem)
Memory	Implement a delay by one major integration time step. Ideally, the block accepts continuous (or fixed in minor time step) signals and outputs a signal that is fixed in minor time step.	Build a Clutch Lockup Model (Friction Mode Logic/Lockup FSM subsystem)
Zero-Order Hold	Convert an input signal with a continuous sample time to an output signal with a discrete sample time.	Developing the Apollo Lunar Module Digital Autopilot
Conditional Hold	Conditionally holds input signal u based on the value of the condition signal, h.

This table shows the following capabilities.

Capability	Memory Block	Unit Delay Block	Zero-Order Hold Block	Conditional Hold Block
Specification of initial condition	Yes	Yes	No, because the block output at time t = 0 must match the input value.	Yes
Specification of sample time	No, because the block can only inherit sample time from the driving block or the solver used for the entire model.	Yes	Yes	No
Support for frame-based signals	No	Yes	Yes	No
Support for state logging	No	Yes	No	No

Ports

Input

u — Input signal

scalar | vector | matrix | n-dimensional array

Input signal that the block holds.

Data Types: single | double | int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64 | Boolean | fixed point | enumerated | bus

h — Hold value condition

1 | 0

Hold value condition, specified as one of these values:

• 1 (true) — The block holds the previously held output value.

• 0 (false).— The output signal value is the same as the current input signal.

Data Types: Boolean

Output

Output 1 — Output signal

scalar | vector | matrix | n-dimensional array

Output signal that is the input held depending on the value of h.

Data Types: single | double | int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64 | Boolean | fixed point | enumerated | bus

Parameters

To edit block parameters interactively, use the Property Inspector. From the Simulink^® Toolstrip, on the Simulation tab, in the Prepare gallery, select Property Inspector.

Initial condition — Initial block hold value

0 (default) | scalar | vector | matrix | n-dimensional array

Initial block hold value, specified as a scalar value, vector, matrix, or n-dimensional array. If input signal u is a vector, Initial Condition scalar expands.

The Conditional Hold block uses the Initial Condition only at the first time step, when the hold value condition, h, is true (1) and the block has no previous input to hold. Otherwise, the block does not use the Initial Condition.

Programmatic Use

To set the block parameter value programmatically, use the set_param function.

To get the block parameter value programmatically, use the get_param function.

Parameter:	InitialCondition
Values:	0 (default) | scalar | vector | matrix | n-dimensional array
Data Types:	single | double | int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64 | logical | fi | enumerated | bus

Block Characteristics

Data Types	Boolean | bus | double | enumerated | fixed point | half | integer | single
Direct Feedthrough	no
Multidimensional Signals	yes
Variable-Size Signals	yes
Zero-Crossing Detection	yes

Extended Capabilities

C/C++ Code Generation

Generate C and C++ code using Simulink® Coder™.

Generated code relies on memcpy or memset functions (string.h) under certain conditions.

Fixed-Point Conversion
Design and simulate fixed-point systems using Fixed-Point Designer™.

Version History

Introduced in R2026b