Modeling, simulation, analysis, and code generation for SoC FPGA devices

SoC FPGAs are semiconductor devices that integrate programmable logic with hard processor cores, such as those from Arm. This architecture provides the ease of programming a processor along with the flexibility and performance of a programmable logic fabric.

SoC FPGAs are available from several sources:

  • Xilinx: Zynq®-7000 SoC and Zynq UltraScale+ MPSoC families
  • Intel: Stratix® 10 SoC FPGAs, Arria® 10 SoC FPGAs, and Arria V SoC and Cyclone® V SoC families
  • Microsemi: PolarFire® SoC devices and SmartFusion2 and SmartFusion® SoC FPGAs

Targeting SoC FPGAs generally requires a combination of embedded software development and FPGA design methodologies. Designers targeting MATLAB® algorithms and Simulink® models to SoC FPGA devices can also use:

  • Embedded Coder® to generate ANSI/ISO C/C++ code targeting embedded processor cores of SoC FPGAs.
  • HDL Coder® to generate IP cores targeting programmable logic of SoC FPGAs.
  • SoC Blockset™ to extend the ability of Simulink to model, simulate, and analyze SoC FPGA architectures, including communication with off-chip DDR memories and I/O devices. SoC Blockset accounts for latency between the components on and off an SoC, which must be considered when developing models of algorithms.
  • HDL Verifier™ to perform FPGA-in-the-loop testing, insert probes using FPGA Data Capture, or control IP cores in programmable logic using MATLAB AXI Master IP.
  • Hardware support packages for Embedded Coder, HDL Coder, and SoC Blockset to target specific boards from Xilinx and Intel.

See also: HDL Coder, Embedded Coder

Deploy MATLAB and Simulink Algorithms to FPGAs for Prototyping

Top-Down FPGA and ASIC Design and Verification with MATLAB and Simulink