Prepare and Analyze Model
Identify analyzable components for unit or system-level testing, address
model incompatibilities or analysis timeout
Use Simulink® Design Verifier™ to guide the design process as you build your model. Avoid potential bugs by running analyses iteratively as you update your model. If you already have an existing design in Simulink, configure portions of your design for Simulink Design Verifier analysis.
If you have an existing model, subsystem, or subchart in Simulink, configure portions of your design for Simulink Design Verifier analysis. Use the bottom-up approach, analyzing smaller components first, for best results with a large or complex model.
Categories
- Analyze Model or Subsystem
Prepare model or subsystem for analysis, run analysis
- Address Model Incompatibilities or Analysis Timeout
Adjust your model, model parameters, or analysis options to better analyze your model
- Parameter Configuration
Overview of parameter configuration for Simulink Design Verifier analysis
- Reduce Model Complexity
Analyze large models by using a bottom-up approach, defining block replacement rules
- Best Practices for Simulink
Design Verifier Analysis
Best practices, considerations, and support limitations for Simulink Design Verifier analysis