Capgemini Accelerates O-RAN Development of 5G NR Wireless Communication System with Arria 10 FPGA

“We started with a working example from MathWorks that included 5G new radio cell search and master information block recovery and modified the design to match customer requirements. This helped simplify our work and saved us a lot of time.”


Use Model-Based Design to integrate, test, and validate 5G NR wireless communication systems


Build a 5G O-RAN emulator with MATLAB and Simulink


  • UE emulator development time reduced by 50%
  • Synchronization of subsystems achieved earlier than expected
  • System implementation validated on the first attempt
Functional block diagram of Capgemini 5 G-N R U E emulator

Capgemini emulator with O-RAN Distributed Unit (O-DU) and Intel FPGA-based O-RU system.

As a multinational IT services and consulting company, Capgemini enables customers across a range of industries to adopt and commercialize digital technologies like AI, machine learning, IoT, and 5G. Most recently, Capgemini turned to MathWorks technology to create a simulation environment for developing, testing, and implementing a customer’s 5G new radio (NR) solution on an Intel® Arria® 10 FPGA board.

With an Open Radio Access Network (O-RAN) emulator built in MATLAB® and Simulink®, Capgemini was able to integrate, test, and validate their customer’s 5G NR communication system through Model-Based Design. This approach ensured that all the pieces, including third-party IP and the custom FPGA board, worked together at each stage of the development process and were compliant with 3GPP specifications. As a result, they cut development time in half.

“We want to help our customers improve business operations through 5G technology,” says Vinoth Thuruvas, the senior technical lead on the project at Capgemini. “With MathWorks tools, we can build and test systems based on each customer’s specifications and hardware using Model-Based Design, minimizing design iterations in the process.”


The biggest challenge for Capgemini is integrating design components from a number of different sources, including existing HDL, third-party IP, and newly created HDL. To meet the customer’s requirements, the engineering team needed to test and verify each component before deploying it to the FPGA board.


The UE emulator that Capgemini built in MATLAB and Simulink has two main units, an O-RAN Distributed Unit (O-DU) and an Intel FPGA-based O-RU system. It supports four 10G/25G evolved common public radio interface (eCPRI) ports and a 4x4 SU/MU-MIMO array for a maximum of 100MHz 5G NR bandwidth toward the RF front-end.

To reduce the complexity of the O-DU section and simplify the design process, Capgemini implemented the NR cell search procedure in O-RU, which involves complete SS-burst processing in the FPGA. This was achieved by modifying the master information block (MIB) recovery reference application included with Wireless HDL Toolbox™. Next, the team wanted to make sure the design was robust even when subjected to system impairments. They used Communications Toolbox™, 5G Toolbox™, and Wireless HDL Toolbox to develop a more comprehensive set of waveforms and evaluate performance.

The team tested for RF impairments such as DC offset and IQ imbalance and used Wireless HDL Toolbox to validate the functionality of Polar Decoder IP blocks provided by their customer. In one case, they discovered a design flaw in a third-party IP block and worked with the customer to get it corrected.

Capgemini engineers used DSP Builder for Intel FPGAs—an FPGA design tool based on Simulink—to implement digital front-end functionality like digital upconverters and digital downconverters within the design. Once they were confident that the design was functionally correct, they used Fixed Point Designer™ and HDL Coder™ to optimize the design and generate RTL for Intel Arria 10 FPGAs.


  • UE emulator development time reduced by 50%. “We estimate that the project would have taken us about two years to complete if we started from scratch without a Model-Based Design framework,” says Vinoth Thuruvas. “Instead, we were able to cut down our development time and effort by 50% and deliver the solution in less than a year.”
  • Synchronization of subsystems achieved earlier than expected. “We used customized hardware from our customer but were able to confirm frequency offset synchronization between O-DU, O-RU, and gNB after a couple of experimental trials, which was much sooner than we anticipated,” says Vinoth Thuruvas.
  • System implementation validated on the first attempt. “Our design and implementation of MIB recovery running on custom hardware worked the first time, meeting all the specifications,” says Vinoth Thuruvas.