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fixing clock frequency and sample time of control system model using hdl coder
See the attached document on the concept of sample time in the model and its relation to clock in the generated code using HDL C...

5 Monate vor | 0

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errors with Simscape and SSC HDL Coder Workflow Advisor
It looks like this issue fixed in R2024a update4. https://www.mathworks.com/support/bugreports/3262131 Can you consider upgra...

5 Monate vor | 0

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Does Simscape Specialized Power Systems blocks work with HDL Coder?
SPS blocks are not currently supported for HDL Code Generation. Please reach out to tech support and share your model of interes...

5 Monate vor | 0

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errors with Simscape and SSC HDL Coder Workflow Advisor
Happy to diagnose this further. Would you be able share your model with us? Thanks.

5 Monate vor | 0

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ive been trying to generate vhdl code using hdl code genrator on matlab 2020a but its showing error regarding the use of fi in my code , can someone fix it for me ? thankyou
Please review MATLAB design patterns here. https://www.mathworks.com/matlabcentral/fileexchange/50098-hdlcoder-design-patterns-...

5 Monate vor | 0

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What is the reason for error in HDL Coder and Cadence Stratus HLS tutorial?
openExample('hdlcoder/GetStartedWithMATLABToSystemCWorkflowUsingHDLCoderAppExample') https://www.mathworks.com/help/hdlcoder/gs...

6 Monate vor | 0

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HDL Tool setup issue
Step1: First check if Vivado is on your system path in your command window. Find out the location of the vivado from within MA...

6 Monate vor | 0

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how can I covert my customize MATLAB to HDl code
This page provides some examples and workflows for HDL code generation from MATLAB and Simulink. https://www.mathworks.com/ma...

6 Monate vor | 0

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OFDM implementation over rayleigh channel with doppler , matlab(simulink) to hdl
These two examples might be helpful. https://www.mathworks.com/help/wireless-hdl/ug/hdlofdmtransmitter.html https://www.mathwo...

6 Monate vor | 0

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What is the reason for error in HDL Coder and Cadence Stratus HLS tutorial?
We are not aware of such issues with Stratus integration. The error seems to happen post MATLAB to SystemC translation during St...

6 Monate vor | 0

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Atan2 block native floating point single HDL generation needs more pipelining
Improved performance for Atan2 block in the R2024a release. HDL Coder has enhanced the design implementation of the Atan2 block...

6 Monate vor | 0

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How to get Simulink HDL Coder RAM with non power of 2 depth.
Does this solve your usecase? function y = ramBanksScalarInput(u, addr) % addr --> 12bits % u --> uint8 persistent ram...

6 Monate vor | 0

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How to get Simulink HDL Coder RAM with non power of 2 depth.
I wonder if you can use the RAM banks feature in HDL Coder. https://www.mathworks.com/help/hdlcoder/ref/hdl.ram-system-object...

6 Monate vor | 0

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Assertion failed error while convereting simulink model to HDL code
Can you please share your model? This error message is not expected. Thanks.

6 Monate vor | 0

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Adaptive pipelining design cannot insert the required number of registers in a feedback loop with integral modules
What version of MATLAB are you using? Can you please share your model? Have you tried using Oversampling factor (>1) to allocat...

6 Monate vor | 0

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Failed Generated HDL code, testbench.
The model on the left has root ports; no stimulus/source blocks in the Simulink. The model on the right has valid sources/...

7 Monate vor | 0

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Examples of Simulink models of spacecraft subsystems controlled by FPGA algorithms
HDL Coder Evaluation Reference Guide https://www.mathworks.com/matlabcentral/fileexchange/58941-hdl-coder-evaluation-referenc...

7 Monate vor | 1

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Not able to Build FPGA BitStream for Simscape example model Half Wave Rectifier
Can you reach out to tech support? I am not sure if this could be Vivado version related issue.

7 Monate vor | 0

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Delay balancing error while using HDL coder
Hi Sanil, would you be able to share your model? Do not hesitate to reach to technical support and we can help further assist y...

7 Monate vor | 0

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Not able to Build FPGA BitStream for Simscape example model Half Wave Rectifier
https://www.mathworks.com/help/hdlcoder/ug/simscape-hil-speedgoat-fpga-io-modules.html What version of synthesis tools AMD/Xi...

7 Monate vor | 0

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How to work with arrays in HDL Coder?
See the attached sample code that demonstorates (line 15, 16) on how create large arrays. I am assuming you are using...

7 Monate vor | 0

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Why I can only choose Xilinx Vivado as the Synthesis tool?
Can you tell us what version of MATLAB are you using? Intel/Altera is supported. You need to have the right support package ins...

7 Monate vor | 0

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How to give random inputs for my simulink design?
You have to wrap the imported Simulink model from HDL Code into a subsystem. Add sources (constants, toworkspace blocks...) an...

7 Monate vor | 0

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Convert Simulink to m file
Correction in the above thread / Accepted Ansswer. Simulink Coder and embedded Coder products support C, C++ code generation...

7 Monate vor | 0

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FPGA Turnkey doesn't update Xilinx Vivado as synthesis tool even after setting tool path
Turnkey workflows are deprecated https://www.mathworks.com/products/hdl-coder.html To target FPGA and SoC devices, use the IP...

7 Monate vor | 0

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MATLAB Function always infers outputs as doubles
It would be hard to reproduce with the partial information above. Sharing a sample MATLAB function supported syntax for HDL cod...

7 Monate vor | 0

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HOW TO: Object detection using automotive RADAR
You should explore HDL Coder based examples in these two products Deep Learning HDL Toolbox: https://www.mathworks.com/help/dee...

7 Monate vor | 0

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Cannot write to AXI-Lite registers [HDL coder, PYNQ, HDL Vision toolbox]
For sobel filter examples using HDL Coder from Simulink consider reviewing these examples. (sampleIn and sampleOut DUT) https:...

7 Monate vor | 0

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I am trying to use "Deploy Neural Network Regression Model to FPGA/ASIC Platform" example
https://www.mathworks.com/matlabcentral/answers/2102651-i-am-trying-to-use-deploy-neural-network-regression-model-to-fpga-asic-p...

8 Monate vor | 0

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How can HDL Code Generation for a full system be performed with System Composer Model that contains multiple Simulink models?
Hi Brad, can you create a support request to help further address this issue? We can followup offline on how to connect System ...

8 Monate vor | 1

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