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HDLCoder Design Patterns and Examples
Several tutorials in this submission show how to generate HDL from MATLAB code, Simulink models, and Simscape models.
17 Tage vor | 13 Downloads |
Building a Peak/pulse-detector macro block for HDL coder (SIMULINK)
Related Post: https://www.mathworks.com/matlabcentral/answers/889752-how-to-store-the-output-of-a-repeating-function-matlab-fun...
21 Tage vor | 0
HDL Coder compatibility with Microchip Libero SoC v2024.1 and roadmap for Libero 2025.x support
Libero SoC v2024.1 support Microchip Libero® SoC v2024.1 is officially supported with HDL Coder starting in MATLAB R2025a, and ...
23 Tage vor | 0
Which EDA tool versions work with HDL Coder?
HDL Coder generates standard VHDL-1993 (IEEE 1076-1993), Verilog-2001 (IEEE 1364-2001), and SystemVerilog-2005 (IEEE 1800-2005...
etwa 2 Monate vor | 1
Frage
Which EDA tool versions work with HDL Coder?
Found several related threads on MATLAB Central asking about EDA tool version compatibility with HDL Coder: AMD/Xilinx Vivado: ...
etwa 2 Monate vor | 1 Antwort | 2
1
AntwortHDL Coder compatibility with Microchip Libero SoC v2024.1 and roadmap for Libero 2025.x support
Which MATLAB releases officially support Libero SoC v2024.1? R2025a, R2025b, and R2026a officially support Libero SoC v2024.1. ...
etwa 2 Monate vor | 0
Will Matlab HDL coder support Altera Agilex 3 and 5 series devices?
Support for Intel/Altera Agilex 3 and Agilex 5 devices is currently part of the future HDL Coder roadmap and is not yet availabl...
2 Monate vor | 0
Using rate transition blocks in HDL coder
A Rate Transition block does not infer a FIFO in HDL, even when ✔ Ensure data integrity during data transfer and ✔ Ensure dete...
2 Monate vor | 0
HDL multi rate simulation
Can you share a sample model? It sounds like you have parts of the design that do not need to be updated at 20e-9s, if that is ...
2 Monate vor | 0
how to deal with stream data to HDLFFT?
Implement FFT Algorithm for FPGA HDL Coder, DSP HDL Toolbox, Simulink This example shows how to implement a hardware-targeted ...
3 Monate vor | 0
HDL QPSK Transmitter and Receiver example problem
Please reach out to tech support if it is still reproducible. Here is the generated output for the example. >> makehdl('commhdl...
3 Monate vor | 0
matlab to vhdl conversion
You should consider using MATLAB Copilot to translate your MATLAB to follow Synthesis friendly rules. Here is some guidance to...
3 Monate vor | 0
Build Linux Image for HDL Coder
Build Custom Linux Image for HDL Coder IP Core https://www.mathworks.com/help/hdlcoder/ug/xilinx-zynq-linux-image-for-custom-bo...
3 Monate vor | 0
| akzeptiert
CIC Filter
These two blocks support HDL Code Generation CIC Decimator https://www.mathworks.com/help/dsphdl/ref/cicdecimator.html https:...
3 Monate vor | 0
I want to generate HDL from a System Object that contains several dsp.FIRFilter objects, the number of which is determined by a Nontunable property
You are correct. HDL Coder (and hardware modeling in general) does not support dynamic behavior in MATLAB code. All structural...
3 Monate vor | 0
| akzeptiert
HDL Code Generation for Moving Maximum function
HDL Coder does not support Moving Maximum block in DSP System Toolbox out of the box. Consider using the attached model built us...
3 Monate vor | 0
Frage
HDL Code Generation for Moving Maximum function
How do I generate HDL Code from Moving Maximum block in DSP System Toolbox?
3 Monate vor | 1 Antwort | 0
1
AntwortDelay balancing failed when generating HDL code
It looks like you are hitting a delay balancing error due to latency in a feedback look in the model cannot be matched. https...
3 Monate vor | 0
simulink can't map matrie to RAM
Hi, Can you please share the model here or reach out to technical support for additional guidance? Thanks
3 Monate vor | 0
Getting Error while using HDL Coder
If you are still facing the issue please reach out to MathWorks technical support. I tried the example model in R2025b release ...
4 Monate vor | 0
Errors when using HDL coder
Can you reach out to technical support with the reproduction steps? Contact Support - MATLAB & Simulink
4 Monate vor | 0
sampling time mismatch in simulink and harware
You do not have to model at the FPGA clock rate in the Simulink model. There are several strategies possible. HDL Coder Evaluat...
4 Monate vor | 0
An instance of AMD cannot be generated in the HDL Coder
https://www.mathworks.com/help/hdlcoder/ug/generate-hdl-code-amd-floating-point-library.html If you are using a recent release ...
4 Monate vor | 1
| akzeptiert
How to register a reference design that contains block design, rtl, and xilinx IP core?
HDL Coder has a lot of integration touch points with custom code, custom IP core modules and integrating with Vits Model Compose...
5 Monate vor | 0
generated HDL code failing in cadence AMS
https://www.mathworks.com/help/hdlcoder/index.html HDL Coder generates Synthesizable RTL. For the list of supported...
5 Monate vor | 1
fixdt outof bounds error for data conversion block
This looks like an unexpected behavior and is a bug in the block implementation. https://www.mathworks.com/help/wireless-hdl/u...
5 Monate vor | 0
Import VHDL in simulink
importhdl Import Verilog or VHDL code and generate Simulink model https://www.mathworks.com/help/hdlcoder/ref/importhdl.html ...
5 Monate vor | 0
HDL Coder generated Verilog code for 2-D LUT block propogates X in Vivado Simulator
Could you please share your test model along with the version of MATLAB you are using? We tested with R2025b using the atta...
5 Monate vor | 0
Sine and Cosine HDL Optimised Block
Please find attached a basic model using the block. https://www.mathworks.com/help/hdlcoder/ref/sinehdloptimizedandcosinehdlopt...
6 Monate vor | 0
Regarding HDL_Coder license
Please reach out to the tech support and connect with the licensing team.
6 Monate vor | 0
