Interfacing an FPGA to an SRAM which has a bidirectional data bus

Problem: Need to interface an external SRAM device to an FPGA The SRAM device has a bidirectional data bus Simulink HDL coder does not appear to support bidirectional pins. Need to avoid stepping out of the Simulink/Stateflow environment.

Question: How to implement the bidirectional nature of the SRAM data bus in a Simulink Model/Stateflow chart.

Observation: I can do it if I create a custom VHDL module that I would then need to compile into a complete FPGA project. This would mean I would have to step outside the Turnkey environment of Simulink (where I can generate the entire project in simulink without having to step out to Quartus) I would hope there is a better solution :)

Answer 1

[Kiran Kintali]

Specify Bidirectional Ports

https://www.mathworks.com/help/hdlcoder/ug/specify-bidirectional-ports.html#buaztj8

You cannot simulate bi-directinal ports in Simulink (Simulink is a synchronous data flow language, outputs depends on inputs and state in the subsystem representing your design).

However during HDL Code generation you can mimic bidirectional ports using code generation settings on a blackbox. Bi-directional ports are propagated to the top of the DUT from the blackbox.