SIMULINK HDL coder error
1 Ansicht (letzte 30 Tage)
Ältere Kommentare anzeigen
Yu Chen
am 29 Jan. 2018
Bearbeitet: Yu Chen
am 29 Jan. 2018
I want to change .m to verilog code. But he will not let me turn, showing "Ports with double or single data type are not supported in the" FPGA Turnkey "workflow. Please update the data type on inport," Y ". ' what can I do?I need this in put.
0 Kommentare
Akzeptierte Antwort
Kiran Kintali
am 29 Jan. 2018
Bearbeitet: Kiran Kintali
am 29 Jan. 2018
Hi Yu,
You need to break the code into a testbench M file (script) and design M file (function); the testbench calls the design which is a function with inputs and outputs. Typically you will translate the design M file to Verilog code using MATLAB HDLCoder workflow after fixed-point conversion.
Please follow instructions below.
1 Kommentar
Weitere Antworten (0)
Siehe auch
Community Treasure Hunt
Find the treasures in MATLAB Central and discover how the community can help you!
Start Hunting!