Simulink models to Verilog HDL coder

14 Ansichten (letzte 30 Tage)
Shahvaiz Pasha
Shahvaiz Pasha am 16 Jan. 2012
Beantwortet: Kiran Kintali am 6 Mär. 2023
i am trying to convert EVD model to verilog code but it doesnt take matrices as input, plz guide.
  1 Kommentar
Walter Roberson
Walter Roberson am 16 Jan. 2012
Is the problem with all matrices, or is it just requiring that the size of the matrix be fixed ?

Melden Sie sich an, um zu kommentieren.

Antworten (1)

Kiran Kintali
Kiran Kintali am 6 Mär. 2023

Community Treasure Hunt

Find the treasures in MATLAB Central and discover how the community can help you!

Start Hunting!

Translated by