Discrepancy between Simulink and hdl code behaviour

I have modelled a control system in simulink.Used fixed point advisor to get all the datatypes. Runs fine in simulation , no issues. I generate hdl code. Flash the code into my FPGA and outputs are not stable. I Find a oscillatory behaviour. What could be the reason? My inputs are correct without noise.

Answer 1

[Kiran Kintali]

Could you reach out to tech support for assistance, or alternatively, share your model here? We’d be happy to take a look and provide feedback. HDL Coder ensures bit-true and cycle-accurate behavior that aligns with the original Simulink model.

[Gary]

Due to the obvious reasons, I will not be able to share the code of the customer. But strange, everything works fine in simulink. But when I fuse into the target, the results go haywire.

[Gary]

Let me elaborate. I have modelled this system with sampling frequency of 2.5KHz. Fixed point width arrived based on the advisor and it works fine as compared to float model. So far so good. Now I simulate the same model with 5KHz and the model works fine as it is able to accomodate the data width. When i generate code and run in target, i get oscillations at the output. When i go back to 2.5KHz sample rate, it works fine. Can anybody explain this?