signal over lapping in Down sampler output for ZYNQ FPGA

1 Ansicht (letzte 30 Tage)
muhammad ahmad
muhammad ahmad am 17 Jun. 2022
I am trying to down sample a 4 MHz signal while the decimated output downsamples the signl in a way that signals of each 1 MHz is appeared in that sameband how can be this output changed dothat all the signlas in the 4 MHz band are represented in 1 MHz

Antworten (1)

Bharath Venkataraman
Bharath Venkataraman am 17 Jun. 2022
Are you trying to implement a chaneelizer? If so, here is the behavioral version in DSP System Toolbox and its HDL equivalent.
  4 Kommentare
muhammad ahmad
muhammad ahmad am 21 Jun. 2022
i do understand MATLAB answer is convienient but i thought you have better understanding of blocks of our intrest so why i f we could discuss it in little details
Bharath Venkataraman
Bharath Venkataraman am 21 Jun. 2022
I may not be the best person to help, so I suggest that you reach out to MathWorks support. They will be able to guide you to the right person.

Melden Sie sich an, um zu kommentieren.

Community Treasure Hunt

Find the treasures in MATLAB Central and discover how the community can help you!

Start Hunting!

Translated by