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Check Input Resolution

Check that input signal has specified resolution

  • Library:
  • Simulink / Model Verification

    HDL Coder / Model Verification

  • Check Input Resolution block

Description

The Check Input Resolution block checks whether the input signal has a specified resolution. The block input and resolution can be either a scalar or vector. The input and resolution must be the same data type.

If the Resolution parameter is a scalar, the block calculates the modulus of the input signal over the provided scalar resolution. The calculated modulus is then compared to a tolerance of 10e-3, and executes an assertion after comparison. If the modulus is less than the tolerance, the assertion is true (1) and the block does nothing. If not, the block halts the simulation and returns an error message by default. If the Resolution parameter is a vector, it asserts true (1) if the value of the input signal is equal to any of the resolution vector elements.

The block compares the input to the resolution in several additional ways depending on the dimensions of the signal and resolution.

  • When comparing a scalar input signal or resolution to a vector input signal or resolution, the block compares the scalar to each element of the vector.

  • When comparing a vector input signal to a vector resolution, the block compares the input signal to the resolution element-by-element.

  • For models with an input signal and resolution that are both vectors, the input signal and resolution must have the same dimensions.

Ports

Input

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Input signal that the block checks against the resolution specified by the Resolution parameter.

Data Types: double

Output

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Output signal that is true (1) if the assertion succeeds and false (0) if the assertion fails. If, in the Configuration Parameters window, in the Math and Data Types section, under Advanced parameters, you select Implement logic signals as Boolean data, then the output data type is Boolean. Otherwise, the data type of the signal is double.

Dependencies

To enable this port, select Output assertion signal.

Data Types: double | Boolean

Parameters

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Specify the resolution requirement for the input signal.

Programmatic Use

Parameter: resolution
Type: character vector
Values: '1' | real scalar or vector
Default: '1'

Clearing this parameter disables the block and causes the model to behave as if the block does not exist. To enable or disable all verification blocks, regardless of the setting of this option, go to the Configuration Parameters window, click Diagnostics > Data Validity, expand the Advanced parameters section, and set Model Verification block enabling to Enable all or Disable all.

Programmatic Use

Parameter: enabled
Type: character vector
Values: 'on' | 'off'
Default: 'on'

Specify a MATLAB® expression to evaluate when the assertion fails. Because the expression is evaluated in the MATLAB workspace, define all variables used in the expression in that workspace.

Dependencies

To enable this parameter, select the Enable assertion parameter.

Programmatic Use

Parameter: callback
Type: character vector
Values: MATLAB expression
Default: ''

Select this parameter to stop the simulation when the check fails. Clear this parameter to display a warning and continue the simulation.

Programmatic Use

Parameter: stopWhenAssertionFail
Type: character vector
Values: 'on' | 'off'
Default: 'on'

Select this parameter to enable the output port.

Programmatic Use

Parameter: export
Type: character vector
Values: 'on' | 'off'
Default: 'off'

Block Characteristics

Data Types

double

Direct Feedthrough

no

Multidimensional Signals

yes

Variable-Size Signals

no

Zero-Crossing Detection

no

Extended Capabilities

PLC Code Generation
Generate Structured Text code using Simulink® PLC Coder™.

Introduced before R2006a