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Check Discrete Gradient

Check that absolute value of difference between successive samples of discrete signal is less than specified value

  • Library:
  • Simulink / Model Verification

    HDL Coder / Model Verification

  • Check Discrete Gradient block

Description

The Check Discrete Gradient block checks each signal element and determines whether the absolute value of the difference between successive values of the element is less than an specified value. The block then executes an assertion after comparison. You can specify the value of gradient (1 by default) by adjusting the Maximum gradient parameter. If the input signal difference is less than the absolute value of the Maximum gradient, the assertion is true (1) and the block does nothing. If not, the block halts the simulation and returns an error message by default.

Note

To run simulations, the Check Discrete Gradient block requires a fixed-step discrete solver. If another solver is selected, an error prompts.

Ports

Input

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Input signal the block checks to determine if the difference of each element between successive samples is less than the absolute value of the Maximum gradient parameter.

Data Types: single | double | int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64 | fixed point

Output

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Output signal that is true (1) if the assertion succeeds, and false (0) if the assertion fails. If, in the Configuration Parameters window, in the Math and Data Types section, under Advanced parameters, you select Implement logic signals as Boolean data, then the output data type is Boolean. Otherwise, the data type of the signal is double.

Dependencies

To enable this output port, select the Output assertion signal parameter check box.

Data Types: double | Boolean

Parameters

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Specify the value on the allowed gradient of the input signal.

Programmatic Use

Parameter: gradient
Type: character vector
Values: real scalar
Default: '1'

Clearing this parameter disables the block and causes the model to behave as if the block does not exist. To enable or disable all verification blocks, regardless of the setting of this option, go to the Configuration Parameters window, click Diagnostics > Data Validity, expand the Advanced parameters section, and set Model Verification block enabling to Enable all or Disable all.

Programmatic Use

Parameter: enabled
Type: character vector
Values: 'on' | 'off'
Default: 'on'

Specify a MATLAB® expression to evaluate when the assertion fails. Because the expression is evaluated in the MATLAB workspace, define all variables used in the expression in that workspace.

Dependencies

To enable this parameter, select the Enable assertion parameter.

Programmatic Use

Parameter: callback
Type: character vector
Values: MATLAB expression
Default: ''

Select this parameter to stop the simulation when the check fails. Clear this parameter to display a warning and continue the simulation.

Programmatic Use

Parameter: stopWhenAssertionFail
Type: character vector
Values: 'on' | 'off'
Default: 'on'

Select this parameter to enable the output port.

Programmatic Use

Parameter: export
Type: character vector
Values: 'on' | 'off'
Default: 'off'

Specify the style of the block icon. The graphic option displays a graphical representation of the assertion condition on the icon. The text option displays a mathematical expression that represents the assertion condition.

Programmatic Use

Parameter: icon
Type: character vector
Values: 'graphic' | 'text'
Default: 'graphic'

Block Characteristics

Data Types

double | fixed point | integer | single

Direct Feedthrough

no

Multidimensional Signals

yes

Variable-Size Signals

no

Zero-Crossing Detection

no

Extended Capabilities

PLC Code Generation
Generate Structured Text code using Simulink® PLC Coder™.

Fixed-Point Conversion
Design and simulate fixed-point systems using Fixed-Point Designer™.

Introduced before R2006a