Main Content

Native Floating Point

HDL Coder native floating-point, the various features supported, how to model your design, generate HDL code, and verify the generated code

HDL Coder™ native floating-point technology can generate HDL code from your floating-point design. These are some of the key features:

  • Generation of target-independent HDL code that you can deploy on any FPGA or ASIC.

  • Support for the full range of IEEE-754 features including denormal numbers, exceptions, and rounding modes.

  • Extensive support for math and trigonometric blocks.

Floating-point designs have better precision, higher dynamic range, and a shorter development cycle than fixed-point designs. If your design has complex math and trigonometric operations, use native floating-point technology.


createFloatingPointTargetConfigCreate floating-point target configuration for floating-point library that you specify


expand all

Float TypecastTypecast a floating-point type to an unsigned integer or vice versa


Getting Started with HDL Coder Native Floating-Point Support

Overview of the native floating point support in HDL Coder and the various features supported.

Generate Target-Independent HDL Code with Native Floating-Point

How to generate HDL code from floating-point Simulink® models.

Verify the Generated Code from Native Floating-Point

How you can verify the generated code from the floating-point model using HDL Testbench, Cosimulation, and FPGA-in-the-loop.

Numeric Considerations with Native Floating-Point

Numerical considerations when generating code with native floating-point and IEEE-754 compliance.

ULP Considerations of Native Floating-Point Operators

ULP considerations, ULP values of native floating-point operators, and adherence to IEEE-754 compliance.

Latency Considerations with Native Floating Point

Learn how to view the latency of a floating point operator and the various ways to customize it.

Simulink Blocks Supported with Native Floating-Point

List of operators and supported blocks in the floating-point model.

Latency Values of Floating-Point Operators

Latency values of operations supported in native floating-point mode.

Critical Path Estimation Without Running Synthesis

Find the estimated critical paths in your design without using third-party synthesis tools.

HDL Block Properties: Native Floating Point

HDL code generation parameters supported for specific block implementations in Native Floating Point.


Allocate Sufficient Delays for Floating-Point Operations

Causes and possible solutions for fixing error message related to delay allocation issue for floating-point operations.

Optimize Generated HDL Code for Multirate Designs with Large Rate Differentials

Causes and possible solutions for fixing HDL code generation issues with multirate models that have large rate differentials.

Featured Examples