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Native Floating Point

Generate and verify HDL code from floating-point designs

You can generate HDL code from your floating-point designs by using HDL Coder™ native floating-point support. When you work with floating-point designs, HDL Coder supports:

  • Target-independent HDL code generation that you can deploy on an FPGA or ASIC device.

  • The full range of IEEE-754 features including denormal numbers, exceptions, and rounding modes.

  • Math and trigonometric functions.

Floating-point designs have better precision, higher dynamic range, and a shorter development cycle than fixed-point designs. If your design has complex math and trigonometric operations, use native floating-point technology.


hdlcoder.FloatingPointTargetConfigFloating-point target configuration for floating-point library
hdlcoder.FloatingPointTargetConfig.IPConfigIP settings for selected floating-point configuration


createFloatingPointTargetConfigCreate floating-point target configuration for floating-point library that you specify


coder.HdlConfigHDL codegen configuration object