Real Reciprocal HDL Optimized

Compute reciprocal and generate optimized HDL code

• Library:

• Fixed-Point Designer HDL Support / Math Operations

• 

Description

The Real Reciprocal HDL Optimized block computes 1/u, where u is a real scalar.

Limitations

Data type override is not supported for the Real Reciprocal HDL Optimized block.

Ports

Input

u — Value to take reciprocal of

real scalar

Value to take the reciprocal of, specified as a real scalar.

Slope-bias representation is not supported for fixed-point data types.

Data Types: single | double | fixed point

validIn — Whether input is valid

Boolean scalar

Whether input is valid, specified as a Boolean scalar. This control signal indicates when the data from the u input port is valid. When this value is 1 (true), the block captures the value at the u input port. When this value is 0 (false), the block ignores the input samples.

Data Types: Boolean

Output

y — Reciprocal

real scalar

Reciprocal, returned as a real scalar with the data type specified by the Output datatype parameter.

Data Types: single | double | fixed point

validOut — Whether output data is valid

Boolean scalar

Whether output data is valid, returned as a Boolean scalar. When the value of this control signal is 1 (true), the block has successfully computed the output at port y. When this value is 0 (false), the output data is not valid.

Data Types: Boolean

Parameters

Output datatype — Data type of output

fixdt(1,18,10) (default) | single | fixdt(1,16,0) | <data type expression>

Data type of the output y, specified as fixdt(1,18,10), single, fixdt(1,16,0), or as a user-specified data type expression. The type can be specified directly, or expressed as a data type object, such as Simulink.NumericType.

Programmatic Use

Block Parameter: OutputType

Type: character vector

Values: 'fixdt(1,18,10)' | 'single' | 'fixdt(1,16,0)' | '<data type expression>'

Default: 'fixdt(1,18,10)'

Model Examples

Implement Hardware-Efficient Real Divide HDL Optimized

How to use the Real Divide HDL Optimized block.

Open Live Script

Algorithms

Division by Zero Behavior

For fixed-point input u, the Real Reciprocal HDL Optimized block wraps on overflow for division by zero. The behavior for fixed-point division by zero is summarized in the table below.

Wrap Overflow	Saturate Overflow
0/0 = 0	0/0 = 0
1/0 = 0	1/0 = upper bound
-1/0 = 0	-1/0 = lower bound

For floating-point inputs, the Real Reciprocal HDL Optimized block follows IEEE^® Standard 754.

Extended Capabilities

C/C++ Code Generation

Generate C and C++ code using Simulink® Coder™.

Slope-bias representation is not supported for fixed-point data types.

HDL Code Generation

Generate Verilog and VHDL code for FPGA and ASIC designs using HDL Coder™.

Restrictions

Supports fixed-point data types only.

Fixed-Point Conversion

Design and simulate fixed-point systems using Fixed-Point Designer™.

Slope-bias representation is not supported for fixed-point data types.

Version History

Introduced in R2021a