dsphdl.FIRInterpolator

Finite impulse response (FIR) interpolation filter

Since R2022a

Description

The dsphdl.FIRInterpolator System object™ implements a single-rate polyphase FIR interpolation filter that is optimized for HDL code generation. The object provides a hardware-friendly interface with input and output control signals. To provide a cycle-accurate simulation of the generated HDL code, the object models architectural latency including pipeline registers and resource sharing.

The object accepts scalar or vector input and outputs a scalar or vector depending on the interpolation factor and the number of cycles between input samples. The object implements a polyphase decomposition with InterpolationFactor subfilters. The filter can implement a serial architecture if there is regular spacing between input samples.

The object provides two filter structures. The direct form systolic architecture provides a fully parallel implementation that makes efficient use of Intel^® and Xilinx^® DSP blocks. The direct form transposed architecture is a fully parallel implementation that is suitable for FPGA and ASIC applications. For a filter implementation that matches multipliers, pipeline registers, and pre-adders to the DSP configuration of your FPGA vendor, specify your target device when you generate HDL code.

All filter structures optimize hardware resources by sharing multipliers for symmetric or antisymmetric filters and by removing the multipliers for zero-valued coefficients such as in half-band filters and Hilbert transforms.

To filter and interpolate input data with an HDL-optimized algorithm::

1. Create the dsphdl.FIRInterpolator object and set its properties.

2. Call the object with arguments, as if it were a function.

To learn more about how System objects work, see What Are System Objects?

Note

You can also generate HDL code for this hardware-optimized algorithm, without creating a MATLAB^® script, by using the DSP HDL IP Designer app. The app provides the same interface and configuration options as the System object.

Creation

Syntax

firInterp = dsphdl.FIRInterpolator

firInterp = dsphdl.FIRInterpolator(INTERP,NUM)

firInterp = dsphdl.FIRInterpolator(___,Name=Value)

Description

firInterp = dsphdl.FIRInterpolator returns a System object firInterp, which upsamples and filters the input signal with the default settings.

firInterp = dsphdl.FIRInterpolator(INTERP,NUM) returns a System object firInterp with the InterpolationFactor property set to INTERP and the Numerator property set to NUM.

firInterp = dsphdl.FIRInterpolator(___,Name=Value) returns an HDL FIR Interpolation System object with one or more properties set by name-value arguments.

Properties

Unless otherwise indicated, properties are nontunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them.

If a property is tunable, you can change its value at any time.

For more information on changing property values, see System Design in MATLAB Using System Objects.

Main

FilterStructure — HDL filter architecture

'Direct form systolic' (default) | 'Direct form transposed'

HDL filter architecture, specified as one of these structures:

• 'Direct form systolic' — This architecture provides a fully parallel filter implementation that makes efficient use of Intel and Xilinx DSP blocks. For a partly serial implementation, specify a value greater than 1 for the NumCycles property. You cannot use frame-based input with the partly serial architecture.

• 'Direct form transposed' — This architecture is a fully parallel implementation that is suitable for FPGA and ASIC applications.

The object implements a polyphase decomposition filter by using dsphdl.FIRFilter System objects. Each filter phase shares resources internally where coefficients and serial options allow. For architecture details, see FIR Filter Architectures for FPGAs and ASICs. When you use a partly-serial systolic architecture and NumCycles is larger than the filter length divided by the interpolation factor, the object interleaves each phase of coefficients over a single FIR filter to share resources between phases.

Numerator — FIR filter coefficients

fir1(35,0.4) (default) | real- or complex-valued vector

FIR filter coefficients, specified as a real- or complex-valued vector. You can specify the vector as a workspace variable or as a call to a filter design function. When the input data type is a floating-point type, the object casts the coefficients to the same data type as the input. When the input data type is an integer type or a fixed-point type, set the coefficient data type by using the CoefficientsDataType property.

Example: firpm(30,[0 0.1 0.2 0.5]*2,[1 1 0 0]) defines coefficients by using a linear-phase filter design function.

Data Types: single | double | int8 | int16 | int32 | uint8 | uint16 | uint32

InterpolationFactor — Interpolation factor

2 (default) | integer greater than two

Interpolation factor, specified as integer greater than two. The output vector size is InputSize * InterpolationFactor. The output vector size must be less than 64 samples.

NumCycles — Minimum number of cycles between valid input samples

1 (default) | positive integer

Specify the minimum number of cycles between the valid input samples as 1 or a positive integer. This property represents N, the minimum number of cycles between valid input samples. When you set NumCycles greater than the filter length, L, and the input and coefficients are both real, the filter uses a single multiplier.

Because the object applies coefficient optimizations before serialization, the sharing factor of the final filter can be lower than the number of cycles that you specified.

Dependencies

To enable this parameter, set FilterStructure to 'Direct form systolic'.

You cannot use frame-based input with NumCycles greater than 1.

OptimizeSymmCoeffs — Share multipliers for symmetric coefficients

true (default) | false

Enable sharing multipliers across symmetric coefficients in the polyphase filter architecture. This optimization reduces latency and halves the number of multipliers.

Polyphase decomposition of symmetric filter coefficients does not result in symmetry in each polyphase branch. For example, if the filter coefficients are [1 2 3 4 4 3 2 1], after decimation by two the polyphase branches are [1 3 4 2] and [2 4 3 1]. Symmetric pairs optimization refactors the coefficients to restore symmetry on the polyphase branches. The implementation includes a post-adder to combine output samples for the refactored polyphase branches. The filter output is the same as the output of the non-optimized implementation.

Data Types

RoundingMethod — Rounding method for type-casting output

'Floor' (default) | 'Ceiling' | 'Convergent' | 'Nearest' | 'Round' | 'Zero'

Rounding method for type-casting the output, specified as 'Floor', 'Ceiling', 'Convergent', 'Nearest', 'Round', or 'Zero'. The object uses this property when casting the output to the data type specified by the OutputDataType property. When the input data type is floating point, the object ignores this property. For more details, see Rounding Modes.

OverflowAction — Overflow handling for type-casting the output

'Wrap' (default) | 'Saturate'

Overflow handling for type-casting the output, specified as 'Wrap' or 'Saturate'. The object uses this property when casting the output to the data type specified by the OutputDataType property. When the input data type is floating point, the object ignores this property. For more details, see Overflow Handling.

CoefficientsDataType — Data type of filter coefficients

'Same word length as input' (default) | numerictype object

Data type of filter coefficients, specified as 'Same word length as input' or a numerictype object. To specify a numerictype object, call numerictype(s,w,f), where:

• s is 1 for signed and 0 for unsigned.

• w is the word length in bits.

• f is the number of fractional bits.

When the input is a fixed-point or integer type, the object casts the filter coefficients using the rule or data type in this property. The quantization rounds to the nearest representable value and saturates on overflow. When the input data type is floating point, the object ignores this property and all internal arithmetic uses the same data type as the input.

The recommended data type for this parameter is 'Same word length as input'.

OutputDataType — Data type of filter output

'Full precision' (default) | 'Same word length as input' | numerictype object

Data type of the filter output, specified as 'Same word length as input', 'Full precision', or a numerictype object. To specify a numerictype object, call numerictype(s,w,f), where:

• s is 1 for signed and 0 for unsigned.

• w is the word length in bits.

• f is the number of fractional bits.

When the input is a fixed-point or integer type, the object casts the output of the filter using the rule or data type in this property. The quantization uses the settings of the RoundingMethod and OverflowAction properties. When the input data type is floating point, the object ignores this parameter and returns output in the same data type as the input.

The object increases the word length for full precision inside each filter tap and casts the final output to the specified type. The maximum final internal data type (WF) depends on the input data type (WI), the coefficient data type (WC), and the number of coefficients (L) and is given by

WF = WI + WC + ceil(log2(L)).

Because the coefficient values limit the potential growth, usually the actual full-precision internal word length is smaller than WF.

Control Arguments

ResetInputPort — Option to enable reset input argument

false (default) | true

Option to enable the reset input argument, specified as true or false. When you set this property to true, the object expects a value for the reset input argument. The reset signal implements a local synchronous reset of the data path registers.

For more reset considerations, see the Reset Signal section on the Hardware Control Signals page.

HDLGlobalReset — Option to connect data path registers to generated HDL global reset signal

false (default) | true

Option to connect the data path registers to the generated HDL global reset signal, specified as true or false. Set this property to true to connect the generated HDL global reset signal to the data path registers. This property does not change the arguments of the object or modify simulation behavior in MATLAB. When you set this property to false, the generated HDL global reset clears only the control path registers. The generated HDL global reset can be synchronous or asynchronous depending on your HDL code generation settings.

For more reset considerations, see the Reset Signal section on the Hardware Control Signals page.

Usage

Syntax

[dataOut,validOut] = firInterp(dataIn,validIn)

[dataOut,validOut] = firInterp(dataIn,validIn,reset)

Description

[dataOut,validOut] = firInterp(dataIn,validIn) filters the input data only when validIn is true.

[dataOut,validOut] = firInterp(dataIn,validIn,reset) filters data when reset is false. When reset is true, the object resets the filter registers. The object expects the reset argument only when you set the ResetInputPort property to true.

For more reset considerations, see the Reset Signal section on the Hardware Control Signals page.

Input Arguments

dataIn — Input data

real or complex scalar or vector

Input data, specified as a real- or complex-valued scalar or vector. The vector size must be less than or equal to 64. When the input data type is an integer type or fixed-point type, the object uses fixed-point arithmetic for internal calculations.

The software supports double and single data types for simulation, but not for HDL code generation.

Data Types: fi | single | double | int8 | int16 | int32 | uint8 | uint16 | uint32
Complex Number Support: Yes

validIn — Indicates valid input data

scalar

Control signal that indicates if the input data is valid. When validIn is 1 (true), the object captures the values from the dataIn argument. When validIn is 0 (false), the object ignores the values from the dataIn argument.

Data Types: logical

reset — Clears internal states

logical scalar

Control signal that clears internal states. When reset is 1 (true), the object stops the current calculation and clears internal states. When the reset is 0 (false) and the input valid is 1 (true), the block captures data for processing.

For more reset considerations, see the Reset Signal section on the Hardware Control Signals page.

Dependencies

To enable this argument, set the ResetInputPort property to true.

Data Types: logical

Output Arguments

dataOut — Interpolated output data

real or complex scalar or vector

Interpolated output data, returned as a real or complex scalar or vector. The vector size is InputSize * InterpolationFactor. When NumCycles is greater than InterpolationFactor, scalar output samples are spaced out with floor(NumCycles/InterpolationFactor) invalid cycles, and the output valid signal indicates which samples are valid after interpolation.

When the input data is floating point, the output data inherits the data type of the input data. When the input data is an integer type or fixed-point type, the OutputDataType property specifies the output data type.

Data Types: fi | single | double | int8 | int16 | int32 | uint8 | uint16 | uint32
Complex Number Support: Yes

validOut — Indicates valid output data

scalar

Control signal that indicates if the output data is valid. When validOut is 1 (true), the object returns valid data from the dataOut argument. When validOut is 0 (false), values from the dataOut argument are not valid.

Data Types: logical

ready — Indicates object is ready for new input data

logical scalar

Control signal that indicates that the object is ready for new input data sample on the next cycle. When ready is 1 (true), you can specify the data and valid inputs for the next time step. When ready is 0 (false), the object ignores any input data in the next time step.

Data Types: logical

Object Functions

To use an object function, specify the System object as the first input argument. For example, to release system resources of a System object named obj, use this syntax:

release(obj)

Specific to dsphdl.FIRInterpolator

getLatency

Latency of FIR filter

Common to All System Objects

step	Run System object algorithm
release	Release resources and allow changes to System object property values and input characteristics
reset	Reset internal states of System object

Algorithms

This System object implements the algorithms described on the FIR Interpolator block reference page.

Extended Capabilities

C/C++ Code Generation

Generate C and C++ code using MATLAB® Coder™.

This System object supports C/C++ code generation for accelerating MATLAB simulations, and for DPI component generation.

HDL Code Generation

Generate VHDL, Verilog and SystemVerilog code for FPGA and ASIC designs using HDL Coder™.

The software supports double and single data types for simulation, but not for HDL code generation.

To generate HDL code from predefined System objects, see HDL Code Generation from Viterbi Decoder System Object (HDL Coder).

Version History

Introduced in R2022a

R2024b: Optimize symmetric coefficients

Set the OptimizeSymmCoeff property to true to enable optimizing symmetric coefficient multipliers in the polyphase filter architecture. This optimization reduces latency and halves the number of multipliers.

R2022b: Increased resource sharing for FIR Interpolator

Starting in R2022b, when NumCycles is greater than the filter length, the object interleaves the coefficients to share multipliers between the polyphase branches. To implement the filter with the minimum number of multipliers, set the NumCycles property to Inf.

In R2022a, the minimum number of multipliers that a partly serial FIR interpolator could use was InterpolationFactor multipliers, which occurred when NumCycles was equal to the filter length. Increasing NumCycles above the filter length resulted in no additional resource sharing.