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Eirik Nordeng


Last seen: 5 Tage vor |  Aktiv seit 2022

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Implementing logarithmic function via Simulink HDL Coder
I need to implement a logarithmic function in Simulink that can be used for generating HDL code using HDL Coder. The Log block i...

8 Monate vor | 1 Antwort | 0

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Create fi object from Simulink data type
I am working on documenting a fixed point model and would like to automate as much as possible. I have a script that lists all i...

9 Monate vor | 1 Antwort | 0

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Documenting ports in a Simulink fixed point model
I am writing documentation for a fixed point model and need to present some text and data about the chosen data types. I would l...

9 Monate vor | 1 Antwort | 0

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HDL Coder throws error "Minimize algebraic loop occurrences" not supported on atomic subsystem '...' for HDL code generation" when the option is disabled
I found the culprit. A submodule further down in the hierarchy had the option "Minimize algebraic loop occurrences" enabled, but...

11 Monate vor | 0

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Generating math expression LUT using variable from workspace
I am following this guide for creating a LUT for a custom math function: Replace a Custom Function with a Lookup Table - MATLAB ...

11 Monate vor | 1 Antwort | 0

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Generic data type configuration based on reference precision.
Thank you, Tom. Your response does not completely match what I was trying to ask, but it turns out that I had made my issue a lo...

11 Monate vor | 0

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HDL Coder throws error "Minimize algebraic loop occurrences" not supported on atomic subsystem '...' for HDL code generation" when the option is disabled
I get the following error from HDL Coder when trying to generate code for a subsystem in a model: "Minimize algebraic loop occu...

11 Monate vor | 2 Antworten | 0

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Generic data type configuration based on reference precision.
I am trying to create a generic model that interfaces a hardware component that has a fixed 44-bit data interface. The input sig...

12 Monate vor | 3 Antworten | 0

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Simulink crashes very often during normal work
I am using Simulink to design a digital system for an FPGA. After fixed-point conversion, I intend to use HDL Coder for generati...

etwa ein Jahr vor | 1 Antwort | 0

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Interfacing hardware components with fixed bit width in Simulink/HDL Coder
I am searching for a generic solution for the following problem: Some FPGA synthesis tools require very specific VHDL code for ...

etwa 2 Jahre vor | 1 Antwort | 0

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