photo

Kristina


JSC SRI Atoll

Aktiv seit 2014

Followers: 0   Following: 0

Nachricht

Statistik

  • Thankful Level 1

Abzeichen anzeigen

Feeds

Anzeigen nach

Frage


Can anyone explain the relationship between simulink sampling time and real world clock in FPGA?
Hello. Can anyone explain the relationship between simulink sampling time and real world clock in FPGA? I'm working with FPGA...

mehr als 9 Jahre vor | 1 Antwort | 0

1

Antwort

Frage


Why do I receive "Unable to match the starting point because it has been elaborated in Altera or it is inside a Stateflow or an MATLAB Function block."?
When I use HDL Workflow Advisor - target workflow "Generic ASIC/FPGA", the last step 4.3. gave me a message "Failed Unable to ma...

fast 10 Jahre vor | 1 Antwort | 0

1

Antwort