MathWorks HDL Coder Team

MathWorks

Last seen: 4 Monate vor | Aktiv seit 2020

Followers: 6 Following: 0

Nachricht

Statistik

All

Feeds

Gesendet

HDL Coder Self-Guided Tutorial
Learn how to deploy an algorithm to an FPGA using MATLAB and Simulink.

4 Monate vor | 41 Downloads |

4.9 / 5

Gesendet

HDL Coder Evaluation Reference Guide
Getting started guide for learning and evaluating HDL Coder

12 Monate vor | 21 Downloads |

4.9 / 5

Gesendet

HDL Coder Support Package for Intel FPGA and SoC Devices
Generate and deploy HDL code and Embedded Software from MATLAB and Simulink for Intel FPGA and SoC devices

fast 2 Jahre vor | 14 Downloads |

2.7 / 5

Gesendet

HDL Coder Support Package for Xilinx FPGA and SoC Devices
Generate and deploy HDL code and Embedded Software from MATLAB and Simulink for Xilinx FPGA and SoC devices

fast 2 Jahre vor | 30 Downloads |

3.4 / 5

Gesendet

HDL Coder Support Package for Xilinx RFSoC Devices
Generate code for the FPGA portion of RFSoC devices

fast 3 Jahre vor | 6 Downloads |

5.0 / 5

Gesendet

Vision HDL Toolbox Support Package for Xilinx Zynq-Based Hardware
Design and prototype vision systems using Xilinx Zynq-based hardware

fast 3 Jahre vor | 11 Downloads |

3.7 / 5

Gesendet

HDL Coder Support Package for Xilinx FPGA Boards
Generate and deploy HDL code for Xilinx development boards

fast 3 Jahre vor | 22 Downloads |

4.5 / 5

Gesendet

HDL Coder Support Package for Intel FPGA Boards
Generate and deploy HDL code for Altera development boards

fast 3 Jahre vor | 12 Downloads |

4.6 / 5

Gesendet

HDL Coder Support Package for Microchip FPGA and SoC Devices
Generate code for Microchip FPGAs and the FPGA portion of SoC Devices

mehr als 4 Jahre vor | 3 Downloads |

0.0 / 5

Beantwortet
HDL IP Core generation for Xilinx Vivado fails since the year turned from 2021 to 2022
Refer to the following External Bug Report for a resolution to this issue: https://www.mathworks.com/support/bugreports/2656440...

mehr als 4 Jahre vor | 5

| akzeptiert

Frage

HDL IP Core generation for Xilinx Vivado fails since the year turned from 2021 to 2022
Since returning to the office in 2022, I have been unable to use HDL Workflow Advisor with Xilinx Vivado. I see the following er...

mehr als 4 Jahre vor | 2 Antworten | 5

2

Antworten

Beantwortet
Generate C code for HLS?
While HLS does take C/C++ as an input, it typically requires some amount of hardware specification to successfully generate HDL....

mehr als 5 Jahre vor | 0

| akzeptiert

Frage

Generate C code for HLS?
Can I generate C code from MATLAB and Simulink and then feed it into a high-level synthesis (HLS) tool to generate HDL?

mehr als 5 Jahre vor | 2 Antworten | 0

2

Antworten

Beantwortet
Does HDL Coder support the VHDL fixed-point and floating-point packages?
No. To ensure full portability and numerical consistency with MATLAB rounding and saturation, HDL Coder generates this functiona...

mehr als 5 Jahre vor | 0

| akzeptiert

Frage

Does HDL Coder support the VHDL fixed-point and floating-point packages?
Does the VHDL code generated by HDL Coder use the IEEE VHDL fixed-point or floating-point packages (IEEE.fixed_pkg.all, IEEE.flo...

mehr als 5 Jahre vor | 1 Antwort | 0

1

Antwort