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DVB-S2 HDL Receiver: frequency synchronization does not working properly
Hi everyone, I am trying to run the standard "DVB-S2 HDL Receiver" example from the Satellite Communications Toolbox. I am usin...
2 Monate vor | 0 Antworten | 0
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AntwortenHow we can build the Xilinx Zynq-Based Radio Linux image for a custom board + FMCOMMS2/3 ?
Can anyone help me, please? To simplify the process, I suggest starting with treating the ZCU102 as a custom board. Addition...
8 Monate vor | 0
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How we can build the Xilinx Zynq-Based Radio Linux image for a custom board + FMCOMMS2/3 ?
Hi, The Communications Toolbox Support Package for Xilinx Zynq-Based Radio uses a default Linux operating system image that i...
8 Monate vor | 1 Antwort | 0
1
AntwortHow to run "Use FPGA I/O to Communicate with FPGA" example in a repetitive For-Loop?
After further investigation, I identified the root cause. The TVALID signal generated for the RX data does not produce a pulse ...
8 Monate vor | 0
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How to run "Use FPGA I/O to Communicate with FPGA" example in a repetitive For-Loop?
Hi, For the example “Use FPGA I/O to Communicate with FPGA”, I followed all the documented steps exactly. I was able to genera...
8 Monate vor | 1 Antwort | 0
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Where to find the default HDL project for ZedBoard or ZCU102 FMCOMMS2/3/4 Xilinx Zynq-Based Radio Linux image?
Hi, The Communications Toolbox Support Package for Xilinx Zynq-Based Radio uses a default operating system image, which is writ...
8 Monate vor | 1 Antwort | 0
