PWM generation - triangle carrier problem
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I am making a simulation off some power converters. I have my topology built with sim power system, my regulation in a triggered simulink subsystem and the modulator is in a regular subsystem. I made a basic pwm modulator as shown in picture 1. Sin wave in alfa/beta come and is converted to normal 3 phases and then compared with the carier signal.
But its not working as intended. Sometimes the "sample" rate of the carrier triangle signal drops and the "is grater" block misses a comparison. See picture 2. The problem seams to be present only at the lower amplitude of the triangle. The repeating sequence block is set up as: Time values [0 tsw/2 tsw] and output values [1 -1 1]
How do I force simulink to always generate the triangle signal to the negative amplitude?
Solver is set to variable-step, max step size 1e-4 relative tolerance 1e-4 and everything else is on auto. I have tried to use different solver and different relative tolerances, but the problem is still there or the simulation takes for ever (1 min runnin and its solved 1e-8 s).
Thank you in advance, Marko
Nick Choi on 29 Dec 2017
Edited: Nick Choi on 29 Dec 2017
It is tough to say without a reproduction model but this could be due to differing sample times between the two signals going into the 'Relational Operator' block. It may be helpful to use something like a 'Rate Transition' block to ensure that they are sampled at the same rate. Additional information on the 'Rate Transition' block can be found in this documentation page:
If you want to generate the triangle signal from the 'Repeating Sequence' block when the input signal's amplitude is negative, you could use a 'Switch' block to change between two output signals:
Also, if the simulation appears to be running slow, it may be an indication that the solver configuration should be altered. The following page provides some useful information on how to select one of the various solvers in Simulink and the pros/cons associated with them:
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