Error - periodic sample time - Pixels to Frame

Hi all, I'm working in a development for image de-blurring using a FPGA programmed by means of Simulink and HDL Coder. I need help with an error message:

The periodic sample time 13024.8 is not allowed because the ratio of this sample time over base rate (7.6776610773294032E-7) is greater than the maximum value of uint32.

I don't know why the block "Pixels to Frame" has this periodic sample time. Could someone please help me?

Thanks in advance.

Answer 1

[Kiran Kintali]

The pixelIn and controlIn should be operating at the same rate when using pixel streaming based interface.

https://www.mathworks.com/help/visionhdl/gs/design-video-processing-algorithms-for-hdl-in-simulink.html

You may also want to check out the new HDL Coder capability to operate at frame level.

HDL Code Generation from Frame-Based Algorithms

https://www.mathworks.com/help/hdlcoder/ug/frame-to-sample-or-pixel-conversion-to-target-stream-based-hardware.html