Does anyone could give me a hint about using the dsp.HDLIFFT in my code for HDL Code Generation?

Im trying to generate a OFDM symbol for HDL Code Generation.

My code is:

 %Main function

 [Xt,validOut] = MODEL(Data_In)

 %QPSK Modulator
 [x_re,x_im,ready] = qpsk(input);

 %if the symbol is ready keep it in ram..for future dataprocessing like Selective Mapping
 [x_re,~] = ram_re[x_re,..]
 [x_im,~] = ram_re[x_im,..]

 %calculate IFFT for Xk = xre + jx_im
 [Xt,validOut] = HDLIFFT128(xk,validIn)

function HDLIFFT128 given as example in the Matlab Documentation:

 function [yOut,validOut] = HDLIFFT128(yIn,validIn)
 %HDLIFFT128 
 % Processes one sample of data using the dsp.HDLIFFT System object(TM)
 % yIn is a fixed-point scalar or column vector. 
 % validIn is a logical scalar.
 % You can generate HDL code from this function.

 persistent ifft128
   if isempty(ifft128)
    ifft128 = dsp.HDLIFFT('FFTLength',128);
  end    
  [yOut,validOut] = step(ifft128,yIn,validIn);
 end

Test Bench for HDLIFFFT128

....

 N=128
 Xt = zeros(1,3*N);
 validOut = false(1,3*N);
 for loop = 1:1:N
     [Xt(loop),validOut(loop)] = HDLIFFT128(complex(Yin(loop)),true);
 end
 for loop = N+1:1:3*N
     [Xt(loop),validOut(loop)] = HDLIFFT128(complex(0),false);
 end

...

Does anyone know why I need to use a 3*N (3*128) loop for getting the IFFT of the input signal (Yin is a 128 size vector)?. I tryed to use the test bench inside my main function but It dosen´t work for HDL Code Generation. So How can I use HDLIIFT128 function in my code?

Answer 1

[Kiran Kintali]

MATLAB Design

function [yOut,validOut] = HDLFFT128(yIn,validIn)
persistent fft128;
if isempty(fft128)
    fft128 = dsp.HDLFFT('FFTLength',128);
end
[yOut,validOut] = fft128(yIn,validIn);
end

Instructions to generate HDL code from above MATLAB code

yIn = fi(complex(0,0), 1, 32, 24, hdlfimath); % compelx signed 32bit input with 24bit fraction length
validIn = true;
c = coder.config('hdl');
codegen -config c -args {yIn, validIn} HDLFFT128 -report

### Begin VHDL Code Generation
### Generating HDL Conformance Report HDLFFT128_hdl_conformance_report.html.
### HDL Conformance check complete with 0 errors, 0 warnings, and 0 messages.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_SDF1_1/SimpleDualPortRAM_generic as SimpleDualPortRAM_generic.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_SDF1_1/SDFCommutator1 as SDFCommutator1.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_SDF1_1 as RADIX22FFT_SDF1_1.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_CTRL1_1 as RADIX22FFT_CTRL1_1.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_SDF2_2/SDFCommutator2 as SDFCommutator2.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_SDF2_2 as RADIX22FFT_SDF2_2.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_CTRL1_2 as RADIX22FFT_CTRL1_2.vhd.
### Working on HDLFFT128/dsp.HDLFFT/TWDLROM_3_1 as TWDLROM_3_1.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_SDF1_3/Complex4Multiply as Complex4Multiply.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_SDF1_3/SDFCommutator3 as SDFCommutator3.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_SDF1_3 as RADIX22FFT_SDF1_3.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_CTRL1_3 as RADIX22FFT_CTRL1_3.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_SDF2_4/SDFCommutator4 as SDFCommutator4.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_SDF2_4 as RADIX22FFT_SDF2_4.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_CTRL1_4 as RADIX22FFT_CTRL1_4.vhd.
### Working on HDLFFT128/dsp.HDLFFT/TWDLROM_5_1 as TWDLROM_5_1.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_SDF1_5/Complex4Multiply as Complex4Multiply_block.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_SDF1_5/SDFCommutator5 as SDFCommutator5.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_SDF1_5 as RADIX22FFT_SDF1_5.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_CTRL1_5 as RADIX22FFT_CTRL1_5.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_SDF2_6/SDFCommutator6 as SDFCommutator6.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_SDF2_6 as RADIX22FFT_SDF2_6.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_CTRL1_6 as RADIX22FFT_CTRL1_6.vhd.
### Working on HDLFFT128/dsp.HDLFFT/TWDLROM_7_1 as TWDLROM_7_1.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_SDF1_7/Complex4Multiply as Complex4Multiply_block1.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_SDF1_7/SDFCommutator7 as SDFCommutator7.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_SDF1_7 as RADIX22FFT_SDF1_7.vhd.
### Working on HDLFFT128/dsp.HDLFFT/RADIX22FFT_CTRL1_1 as RADIX22FFT_CTRL1_1_block.vhd.
### Working on HDLFFT128/dsp.HDLFFT as dsp_HDLFFT.vhd.
### Working on HDLFFT128 as HDLFFT128.vhd.
### Generating package file HDLFFT128_pkg.vhd.
### Generating Resource Utilization Report resource_report.html.
### Code generation successful: View report
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