How can I create SPWM from ePWM blocks for C2000 in Simulink?

I am working on generating Sinusoidal Pulse Width Modulation (SPWM) signals using the ePWM blocks in Simulink for a Texas Instruments C2000 microcontroller (specifically the TMS320F28379D). This is part of a project involving an Active Neutral Point Clamped (ANPC) inverter topology, where accurate and synchronized SPWM signals are essential to ensure proper switching behavior and voltage balancing.

I want to generate SPWM wave with 12 kHz switching frequency and 50 Hz modulating signal frequency.

My goal is to generate a sine wave in Simulink, use it to modulate the duty cycle of the PWM signals, and implement the control on the hardware using Embedded Coder.

However, I am facing a phase shift or misalignment between the reference sine wave and the actual ePWM outputs. I suspect this is due to a mismatch in sample times or unsynchronized ePWM configurations.

⚙ Setup Summary:

• Sine wave is generated in Simulink using a Sine Wave block.
• The sine signal is directly mapped to the duty cycle input of the ePWM blocks.
• ePWM blocks are configured in Up-Down Count mode.
• Sample time for both the control algorithm and the ePWM blocks is set to a fixed step size (e.g., 1e-5 s).
• I’m using the Embedded Coder support package for TI C2000 to build and deploy the model.
• Target hardware: TMS320F28379D (for a 3-phase ANPC inverter system).

🖼 Observed Issue:

I have attached two waveform captures that clearly illustrate the issue:

Even when the sine reference input is steady, the duty cycle of the PWM outputs gradually increases and decreases over time, instead of remaining constant. This suggests a possible timing misalignment, incorrect update mechanism, or buffer/sample time conflict between Simulink and the hardware.

❓ My Questions:

• How can I correctly synchronize the SPWM generation using ePWM blocks in Simulink?
• What is the best practice to align the sine reference with the PWM output timing in real-time applications?
• Could this behavior be caused by sample time mismatches or improper compare value updates in ePWM?
• Are there any recommended settings or mechanisms to generate stable and consistent SPWM for multilevel inverter applications such as ANPC?

Additionally, I have attached two waveform captures that clearly show the issue. Although the duty cycles should remain constant for a steady sine reference input, I observe that the actual PWM outputs gradually increase and decrease over time, even when the input sine signal remains stable.

This indicates that there may be a timing mismatch, buffer misalignment, or sample time conflict between the generated sine wave and the ePWM block. It appears as if the PWM signal is slowly drifting or modulating on its own, despite a constant input.

I would appreciate any guidance on:

• How to ensure consistent and stable duty cycle generation with ePWM in Simulink,
• How to properly synchronize signal updates to ePWM compare registers.

Answer 1

[S@m]

Hi Semih,

I understand that you are implementing SPWM using ePWM in Simulink and observing a phase misalignment and drift between the generated output and modulating input signal. The misalignment and drift are likely caused by a mismatch in sample times. To correct this,

1. Update the solver ‘Fixed-Step Size’ parameter: For a 12 kHz SPWM, the PWM period is 8.333e-5seconds (1/12000). In Simulink, go to the‘MODELLING’ tab → ‘Model Settings’ → ‘Solver’, set ‘Type’ from ‘Variable-step’ to ‘Fixed-step’ and update the ‘Fixed-step size’ from 1e-5 to 8.333e-5.
2. Synchornize the sample times: Explicitly set the sample time of all ‘Sine Wave’ blocks (and any duty cycle sources) to 8.333e-5seconds. This ensures the ePWM compare register updates are synchronized with the PWM period.
3. Configure the ePWM Compare Register Reload: In the ePWM block parameters, under the ‘Counter compare’ tab, set all ‘Reload for compare X register’ parameters to ‘CTR=Zero or CTR=PRD’ value. This ensures the compare registers are updated at consistent points in the PWM cycle.

Additionally, you may refer to the below MATLAB answers for modelling the compare logic input to the ePWM blocks.

1. https://www.mathworks.com/support/search.html/answers/2129336-generate-a-spwm-signal-with-digital-output-of-c2000-microcontroller-blockset-or-with-epwm-of-c2000-m.html?fq%5B%5D=asset_type_name:answer&fq%5B%5D=category:ti-c2000/index&page=1
2. https://www.mathworks.com/support/search.html/answers/2154610-control-of-stand-alone-three-phase-inverter-using-c2000-block-set-in-simulink.html?fq%5B%5D=asset_type_name:answer&fq%5B%5D=category:ti-c2000/index&page=1
3. https://www.mathworks.com/support/search.html/answers/2129566-how-can-i-make-a-connection-from-the-epwm-block-to-the-mosfet-driver-of-the-invertor-circuit-in-simu.html?fq%5B%5D=asset_type_name:answer&fq%5B%5D=category:sps/semiconductors-and-converters&page=1
4. https://www.mathworks.com/support/search.html/answers/2043952-spwm-using-f28035-epwm.html?fq%5B%5D=asset_type_name:answer&fq%5B%5D=category:support/texas-ins6816&page=1
5. https://www.mathworks.com/support/search.html/answers/1978639-how-can-i-obtain-12-spwm-signals-from-f28379d-launchpad-using-epwm-blocks.html?fq%5B%5D=asset_type_name:answer&fq%5B%5D=category:support/texas-ins6816&page=1

Answer 2

[Mukul Choudhury]

Hi,

In Sinusoidal PWM, the pulse width will follow sinusoidal pattern i.e. it increases and reaches maximum and then starts reducing. The empty part that you have marked in the PWM may come when compare value is very close to the time base period of the PWM. Please check the maximum value of the compare register that is used to generate PWM.

Hope this helps,

Thanks,

Mukul