Unable to see FFT output in co-simulation after HDL conversion.

I have converted the following simulink model to VHDL:

modelname = 'FFTHDLOptimizedExample_Streaming';

open_system(modelname);

The issue I am facing is that after conversion to hdl when I do co-simulationm, I am only seeing clock pulses for hdl output, is there any way i can see the fft output for hdl.

I want to see the fft output in co-simulation such that i see simulink model output first, followed by hdl output (fft wanted) and lastly the error between them.

Answer 1

[akshatsood]

Dear @Jaykishan Solanki,

I understand that you are performing a co-simulation and are unable to locate the FFT output. Since I have limited information about your model setup and the steps you have followed, I recommend consulting the MathWorks documentation titled "Set Up for HDL Cosimulation," which can be accessed from the link below:

https://www.mathworks.com/help/hdlverifier/ug/startup-for-hdl-cosimulation.html

This documentation outlines the requirements for co-simulating your HDL code with your Simulink design.

Moreoever, I suggest reviewing the example "Fixed-point Viterbi Decoder". This example demonstrates how to build a Simulink model, generate HDL code, launch an HDL simulator, and conclude with running the co-simulation and comparing the BER results for both Simulink and HDL simulation. This example seems to align with the requirements specified in your question. Please access it using the link below:

https://www.mathworks.com/help/hdlverifier/ug/verify-viterbi-decoder-using-hdl-cosimulation.html

I hope this helps.