Cannot connect to model 'time_simulink'; please try Update Diagram (Ctrl-D). Caused by: Error in 'time_simu​link/Upsam​ple': All sample times for this block must be discrete. C

Cannot connect to model 'time_simulink'; please try Update Diagram (Ctrl-D).

Caused by:

• Error in 'time_simulink/Upsample': All sample times for this block must be discrete. Continuous sample time is not allowed.

[Fayaz]

please give me a sollution

[Lakshya]

Please attach the 'time_simulink' simulink model file.

[Fayaz]

Answer 1

[Daniel]

You're trying to upsample a continuous input. The input has to have a discrete sample time before it can be upsampled. The sample time is the period (in simulated time) between updates to the signal. E.g. a sample time of 0.2 would mean that the signal value changes at time 0, 0.2, 0.4, etc.

If the input to your upsample block is an inport, you can set a sample time under the Execution tab.

If the input to your upsample block is a constant, you can set a sample time under the Main tab.

If the input to your upsample block comes from other signals within the system, you can use a Zero-Order Hold (from the Simulink/Discrete library, among other places) to make the output have a discrete sample time.

If you post your full model or more context, we will be able to provide a more targeted suggestion. For instance, what kind of signal is going into the Upsample block? Where does it come from? What are you intending to accomplish? Is the system intended for code generation?

[Fayaz]

im taking the input form the matlab workspace. The workspace element is an LTE filtered waveform. so it is complex double value. i separated the real and imaginary value and converted to timetable objects. those timetable objects are fed to the inport blocks. then upsample block does it work and produce an ouput in the matlab workspace. finally compare the simulink upsample block output and matlab script output are same or not.

% clear

close all

clc

% 5MHz carrier

fs = 7.68;

tdw=LTE5_3_1.waveform;

%% SHOLDER REMOVING

shape5_out = conv(tdw,shape5);

% first 5 samples

shape5_out_5 = shape5_out(1:5);

%% timetable convertion

% Create a time vector

t = 1:5;

shape5_out_100_real = real(shape5_out_5);

shape5_out_100_imag = imag(shape5_out_5);

%% Create the time vector

t1 = seconds(1:5); % Convert the time vector to duration format

%% Create timetable objects for real and imaginary waveforms

shape5_out_T_real = timetable(t1', shape5_out_5_real, 'VariableNames', {'Real'});

shape5_out_T_imag = timetable(t1', shape5_out_5_imag, 'VariableNames', {'Imaginary'});

[Daniel]

You're running into issues because your inports don't specify a sample time. When you pass a timetable into Simulink, it assumes the timetable is a sampled representation of a continuous signal. It doesn't infer a constant timestep, which is needed for a block like Upsample to make sense.

You need to open up each Inport and set the sample time (under the "Execution" tab) to some discrete value. I would recommend that you create a "Ts" variable in your MATLAB script, representing the timestep in your timetable. Then you can set each Inport's Sample time parameter to Ts.

You can also pass the data in as a complex value, as far as Simulink is concerned. There's no reason (as far as I can tell) to break the complex signal into real and imaginary components and re-mix them in the model, unless the script you're using is a proxy for some system that starts with separated signal components.

[Fayaz]

thank you so much Daniel. if im not separate and re-mix the values, it doos not give the correct output (means the simulink output is different from matlab script output), the values become different when the whole complex is given as the input.

[Fayaz]

Im a beginner in matlab, so if im not able to make it done, can you help me to solve through guiding.

[Fayaz]

thanks in advance and i would be grateful if ua can consider

[Fayaz]

You need to open up each Inport and set the sample time (under the "Execution" tab) to some discrete value. I would recommend that you create a "Ts" variable in your MATLAB script, representing the timestep in your timetable. Then you can set each Inport's Sample time parameter to Ts.

for this case, you can see, i have defined 't1' for timesteps in the timetable. so can i use 'Ts=1' as sampletime in the inport block parameter setting? because my timetable step size is 1 and then im getting an error like,

[Daniel]

Yes, Ts=1 should be fine.

However, if you're getting an error related to fixed-step size, you've made a few other changes to the model since last time you submitted it. Since you're targeting HDL code, run hdlsetup on your model. I.e., hdlsetup coming_upsample_in_out_ports or hdlsetup(bdroot). That will get the model solver set up properly and fix the "Invalid setting" error you're seeing.

[Fayaz]

thanks alot brother. it works and generate hdl code. hats off to you. i was trying to fix this error for a long time.

[Fayaz]

in futture i really need your help to complete my undergraduate project. is it ok for you? i would never forget your help and grateful to you.

[Fayaz]

// -------------------------------------------------------------

//

// File Name: hdlsrc\coming_upsample_in_out_ports\coming_upsample_in_out_ports.v

// Created: 2023-06-24 22:03:44

//

// Generated by MATLAB 9.14 and HDL Coder 4.1

//

//

// -- -------------------------------------------------------------

// -- Rate and Clocking Details

// -- -------------------------------------------------------------

// Model base rate: 0.5

// Target subsystem base rate: 1

//

// -------------------------------------------------------------

// -------------------------------------------------------------

//

// Module: coming_upsample_in_out_ports

// Source Path: coming_upsample_in_out_ports

// Hierarchy Level: 0

//

// -------------------------------------------------------------

`timescale 1 ns / 1 ns

module coming_upsample_in_out_ports

(In1,

In2);

input [31:0] In1; // single

input [31:0] In2; // single

endmodule // coming_upsample_in_out_ports

############################## IT GENERATED THIS KIND OF VERILOG HDL CODE. IS THIS OK?

[Fayaz]

IT GENERATED THIS KIND OF VERILOG HDL CODE. IS THIS OK?

[Fayaz]

one another huge help please. i have to build the hdl block set for NCO(frequency shifting). so i selected a HDL NCO block but i dont know how to set the parameter configuration according to my script. i have through the MATLAB simulink HDL guide, but i could not understand. i will attch the details can you help me to do that. Also i have attched the workspace for the script. please be kind enough to give a support

[Daniel]

If you have a question on the NCO, it will be better to file that as a separate question. That way the question will get a fresh set of eyes on the forum, and the answer will be a lot easier for others with the same question to find as well.

[Fayaz]

ok. i'll post as new question. i'll expect your reply for that one. thank you

[Fayaz]

sir , do you have tie to check out this NCO problem, thats kind nore difficult part to me

[Fayaz]

no one made a reply. can you hep me?

[Fayaz]

can you give a support, if you have time. please

[Fayaz]

sir, im around the corner for my submission, can you be pleased to give support . i would be grateful to your support

[Fayaz]

hello sir

[Fayaz]

hi sir