Complex Partial-Systolic Matrix Solve Using Q-less QR Decomposition with Forgetting Factor

Compute the value of X in the equation A'AX = B for complex-valued matrices with infinite number of rows using Q-less QR decomposition

Since R2020b

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Libraries:
Fixed-Point Designer HDL Support / Matrices and Linear Algebra / Linear System Solvers

Description

The Complex Partial-Systolic Matrix Solve Using Q-less QR Decomposition with Forgetting Factor block solves the system of linear equations, A'AX = B, using Q-less QR decomposition, where A and B are complex-valued matrices. A is an infinitely tall matrix representing streaming data.

When the regularization parameter is nonzero, the Complex Partial-Systolic Matrix Solve Using Q-less QR Decomposition with Forgetting Factor initializes the first upper-triangular factor R to λI_n before factoring in the rows of A, where λ is the regularization parameter and I_n = eye(n).

Examples

Implement Hardware-Efficient Complex Partial-Systolic Matrix Solve Using Q-less QR Decomposition with Forgetting Factor

How to use the Complex Partial-Systolic Matrix Solve Using Q-less QR Decomposition with Forgetting Factor block.

• Open Script

Algorithms to Determine Fixed-Point Types for Complex Q-less QR Matrix Solve A'AX=B

Derivation of algorithms for determining fixed-point types for complex Q-less QR matrix solve.

• Open Live Script

Determine Fixed-Point Types for Complex Q-less QR Matrix Solve A'AX=B

Use fixed.complexQlessQRFixedpointTypes to determine fixed-point types for computation of the complex least-squares matrix equation.

• Open Live Script

Fixed-Point HDL-Optimized Minimum-Variance Distortionless-Response (MVDR) Beamformer

Implement a hardware-efficient MVDR beamformer.

• Open Script

Compute Forgetting Factor Required for Streaming Input Data

Use fixed.forgettingFactor and fixed.forgettingFactorInverse to compute forgetting factor.

• Open Live Script

Ports

Input

A(i,:) — Rows of matrix A

vector

Rows of matrix A, specified as a vector. A is an infinitely tall matrix of streaming data. If B is single or double, A must be the same data type as B. If A is a fixed-point data type, A must be signed, use binary-point scaling, and have the same word length as B. Slope-bias representation is not supported for fixed-point data types.

Data Types: single | double | fixed point
Complex Number Support: Yes

B — Matrix B

matrix | vector

Matrix B, specified as a vector or a matrix. B is an n-by-p matrix where n ≥ 2. If A is single or double, B must be the same data type as A. If B is a fixed-point data type, B must be signed, use binary-point scaling, and have the same word length as A. Slope-bias representation is not supported for fixed-point data types.

Data Types: single | double | fixed point

validInA — Whether A input is valid

Boolean scalar

Whether A(i, ;) input is valid, specified as a Boolean scalar. This control signal indicates when the data from the A(i,:) input port is valid. When this value is 1 (true) and the readyA value is 1 (true), the block captures the values at the A(i,:) input port. When this value is 0 (false), the block ignores the input samples.

After sending a true validInA signal, there may be some delay before readyA is set to false. To ensure all data is processed, you must wait until readyA is set to false before sending another true validInA signal.

Data Types: Boolean

validInB — Whether input B is valid

Boolean scalar

Whether input B is valid, specified as a Boolean scalar. This control signal indicates when the data from the B input port is valid. When this value is 1 (true) and the readyB value is 1 (true), the block captures the values at the B input port. When this value is 0 (false), the block ignores the input samples.

After sending a true validInB signal, there may be some delay before readyB is set to false. To ensure all data is processed, you must wait until readyB is set to false before sending another true validInB signal.

Data Types: Boolean

restart — Whether to clear internal states

Boolean scalar

Whether to clear internal states, specified as a Boolean scalar. When this value is 1 (true), the block stops the current calculation and clears all internal states. When this value is 0 (false) and the validInA and validInB values are 1 (true), the block begins a new subframe.

Data Types: Boolean

Output

X — Matrix X

matrix | vector

Matrix X, returned as a matrix or vector.

Data Types: single | double | fixed point

validOut — Whether output data is valid

Boolean scalar

Whether the output data is valid, returned as a Boolean scalar. This control signal indicates when the data at the output port X is valid. When this value is 1 (true), the block has successfully computed a row of X. When this value is 0 (false), the output data is not valid.

Data Types: Boolean

readyA — Whether block is ready for input A

Boolean scalar

Whether the block is ready for input A, returned as a Boolean scalar. This control signal indicates when the block is ready for new input data. When this value is 1 (true) and validInA value is 1 (true), the block accepts input data in the next time step. When this value is 0 (false), the block ignores input data in the next time step.

After sending a true validInA signal, there may be some delay before readyA is set to false. To ensure all data is processed, you must wait until readyA is set to false before sending another true validInA signal.

Data Types: Boolean

readyB — Whether block is ready for input B

Boolean scalar

Whether the block is ready for input B, returned as a Boolean scalar. This control signal indicates when the block is ready for new input data. When this value is 1 (true) and validInB value is 1 (true), the block accepts input data in the next time step. When this value is 0 (false), the block ignores input data in the next time step.

After sending a true validInB signal, there may be some delay before readyB is set to false. To ensure all data is processed, you must wait until readyB is set to false before sending another true validInB signal.

Data Types: Boolean

Parameters

Number of columns in matrix A and rows in matrix B — Number of columns in matrix A and rows in matrix B

4 (default) | positive integer-valued scalar

Number of columns in matrix A and rows in matrix B, specified as a positive integer-valued scalar.

Programmatic Use

Block Parameter: n

Type: character vector

Values: positive integer-valued scalar

Default: 4

Number of columns in matrix B — Number of columns in matrix B

1 (default) | positive integer-valued scalar

Number of columns in matrix B, specified as a positive integer-valued scalar.

Programmatic Use

Block Parameter: p

Type: character vector

Values: positive integer-valued scalar

Default: 1

Forgetting factor — Forgetting factor applied after each row of the matrix is factored

0.99 (default) | real positive scalar

Forgetting factor applied after each row of the matrix is factored, specified as a real positive scalar. The output is updated as each row of A is input indefinitely.

Programmatic Use

Block Parameter: forgettingFactor

Type: character vector

Values: positive integer-valued scalar

Default: 0.99

Regularization parameter — Regularization parameter

0 (default) | real nonnegative scalar

Regularization parameter, specified as a nonnegative scalar. Small, positive values of the regularization parameter can improve the conditioning of the problem and reduce the variance of the estimates. While biased, the reduced variance of the estimate often results in a smaller mean squared error when compared to least-squares estimates.

Programmatic Use

Block Parameter: regularizationParameter

Type: character vector

Values: real nonnegative scalar

Default: 0

Output datatype — Data type of output matrix X

fixdt(1,18,14) (default) | double | single | fixdt(1,16,0) | <data type expression>

Data type of the output matrix X, specified as fixdt(1,18,14), double, single, fixdt(1,16,0), or as a user-specified data type expression. The type can be specified directly, or expressed as a data type object such as Simulink.NumericType.

Programmatic Use

Block Parameter: OutputType

Type: character vector

Values: 'fixdt(1,18,14)' | 'double' | 'single' | 'fixdt(1,16,0)' | '<data type expression>'

Default: 'fixdt(1,18,14)'

Tips

• Use fixed.forgettingFactor to compute the forgetting factor, α, for an infinite number of rows with the equivalent gain of a matrix with m rows.

• Use fixed.forgettingFactorInverse to compute the number of rows, m, of a matrix with equivalent gain corresponding to forgetting factor α

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Algorithms

Q-less QR Decomposition with Forgetting Factor

The Complex Partial-Systolic Matrix Solve Using Q-less QR Decomposition with Forgetting Factor block implements the following recursion to compute the upper-triangular factor R of continuously streaming n-by-1 row vectors A(k,:) using forgetting factor α. It's as if matrix A is infinitely tall. The forgetting factor in the range 0 < α < 1 prevents it from integrating without bound.

$$\begin{array}{c}{R}_0=\mathrm{zeros}(n,n)\\ \left[\sim ,R_1\right]=\mathrm{qr}\left(\left[\begin{array}{c}{R}_0\\ A\left(1,:\right)\end{array}\right],0\right)\\ R_1=\alpha R_1\\ \left[\sim ,R_2\right]=\mathrm{qr}\left(\left[\begin{array}{c}{R}_1\\ A\left(2,:\right)\end{array}\right],0\right)\\ R_2=\alpha R_2\\ ⋮\\ \left[\sim ,R_k\right]=\mathrm{qr}\left(\left[\left[\begin{array}{c}{R}_{k-1}\\ A\left(k,:\right)\end{array}\right]\right],0\right)\\ R_k=\alpha R_k\\ ⋮\end{array}$$

Q-less QR Decomposition with Forgetting Factor and Tikhonov Regularization

The output X_k after processing the k^th input A(k,:) is computed using the following iteration.

$$\begin{array}{c}{R}_0=\lambda I_n\\ \left[~,R_1\right]=\mathrm{qr}\left(\left[\begin{array}{c}{R}_0\\ A\left(1,:\right)\end{array}\right],0\right)\\ R_1=\alpha R_1\\ X_1=R_1\backslash \left(R{\text{'}}_1\backslash B\right)\\ \left[~,R_2\right]=\mathrm{qr}\left(\left[\begin{array}{c}{R}_1\\ A\left(2,:\right)\end{array}\right],0\right)\\ R_2=\alpha R_2\\ X_2=R_2\backslash \left(R{\text{'}}_2\backslash B\right)\\ ⋮\\ \left[~,R_k\right]=\mathrm{qr}\left(\left[\begin{array}{c}{R}_{k-1}\\ A\left(k,:\right)\end{array}\right],0\right)\\ R_k=\alpha R_k\\ X_k=R_k\backslash \left(R{\text{'}}_k\backslash B\right)\\ ⋮\end{array}$$

This is mathematically equivalent to computing A'_kA_kX = B, where A_k is defined as follows, though the block never actually creates A_k.

$$A_k=\left[\begin{array}{c}{\alpha }^k\lambda I_n\\ \left[\begin{array}{cccc}{\alpha }^k& & & \\ & {\alpha }^{k-1}& & \\ & & \ddots & \\ & & & \alpha \end{array}\right]A\left(1:k,:\right)\end{array}\right]$$

Forward and Backward Substitution

When an upper triangular factor is ready, then forward and backward substitution are computed with the current input B to produce output X.

$$X=R_k\backslash \left(R_k^{\text{'}}\backslash B\right)$$

Choosing the Implementation Method

Systolic implementations prioritize speed of computations over space constraints, while burst implementations prioritize space constraints at the expense of speed of the operations. The following table illustrates the tradeoffs between the implementations available for matrix decompositions and solving systems of linear equations.

Implementation	Throughput	Latency	Area
Systolic	C	O(n)	O(mn2)
Partial-Systolic	C	O(m)	O(n2)
Partial-Systolic with Forgetting Factor	C	O(n)	O(n2)
Burst	O(n)	O(mn)	O(n)

Where C is a constant proportional to the word length of the data, m is the number of rows in matrix A, and n is the number of columns in matrix A.

For additional considerations in selecting a block for your application, see Choose a Block for HDL-Optimized Fixed-Point Matrix Operations.

AMBA AXI Handshake Process

This block uses the AMBA AXI handshake protocol [1]. The valid/ready handshake process is used to transfer data and control information. This two-way control mechanism allows both the manager and subordinate to control the rate at which information moves between manager and subordinate. A valid signal indicates when data is available. The ready signal indicates that the block can accept the data. Transfer of data occurs only when both the valid and ready signals are high.

Block Timing

The Partial-Systolic Matrix Solve Using Q-less QR Decomposition with Forgetting Factor blocks accept matrix A row-by-row and matrix B as a single vector. After accepting the first valid pair of A and B matrices, the block outputs the X matrices row by row continuously.

For example, assume that the input A matrix is 3-by-3. Additionally assume that validIn asserts before ready, meaning that the upstream data source is faster than the QR decomposition.

In the figure,

• A1r1 is the first row of the first A matrix, A1r2 is the second row of the first A matrix, and so on.

• validIn to ready — From a successful A row input to the block being ready to accept the next row.

• validOut to validOut — Because the Forward Backward Substitution block runs continuously, it generates output at a constant rate. This is the delay between two adjacent valid outputs.

• Last row validIn to validOut — From the last m^th row input to the block starting to output the solution.

• This block is always ready to accept B matrices, so readyB is always asserted.

The following table provides details of the timing for the Complex Partial-Systolic Matrix Solve Using Q-less QR Decomposition with Forgetting Factor block. Latency depends on the size of matrix A and the data types of the A and B matrices. In the table:

• n is the number of columns in matrix A.

• wl represents the word length of the input data in matrix A.

Input Data Type	validIn to ready (cycles)	validOut to validOut (cycles)	Last Row validIn to validOut (cycles)
Fixed point fi	wl + 9	4*n2 + 25*n + 5 + 2*n*wl + 2*n*nextpow2(wl)	4*n2 + 25*n + 5 + 2*n*wl + 2*n*nextpow2(wl) + (wl + 7.5)*2*n + 2
Scaled double fi	wl + 9	4*n2 + 23*n + 5 + 2*n*wl	4*n2 + 38*n + 4*n*wl + 7
double	62	4*n2 + 21*n + 5	4*n2 + 142*n + 7
single	33	4*n2 + 21*n + 5	4*n2 + 84*n + 7

Hardware Resource Utilization

This block supports HDL code generation using the Simulink^® HDL Workflow Advisor. For an example, see HDL Code Generation and FPGA Synthesis from Simulink Model (HDL Coder) and Implement Digital Downconverter for FPGA (DSP HDL Toolbox).

In R2022b: The following tables show the post place-and-route resource utilization results and timing summary, respectively.

This example data was generated by synthesizing the block on a Xilinx^® Zynq^® UltraScale™ + RFSoC ZCU111 evaluation board. The synthesis tool was Vivado^® v.2020.2 (win64).

The following parameters were used for synthesis.

• Block parameters:

  • n = 16

  • p = 1

  • Matrix A dimension: inf-by-16

  • Matrix B dimension: 16-by-1

• Input data type: sfix16_En14

• Target frequency: 250 MHz

Resource	Usage	Available	Utilization (%)
CLB LUTs	334280	425280	78.60
CLB Registers	261319	850560	30.72
DSPs	12	4272	0.28
Block RAM Tile	0	1080	0.00
URAM	0	80	0.00

	Value
Requirement	4 ns
Data Path Delay	3.892 ns
Slack	0.088 ns
Clock Frequency	255.62 MHz

References

[1] "AMBA AXI and ACE Protocol Specification Version E." https://developer.arm.com/documentation/ihi0022/e/AMBA-AXI3-and-AXI4-Protocol-Specification/Single-Interface-Requirements/Basic-read-and-write-transactions/Handshake-process

Extended Capabilities

C/C++ Code Generation

Generate C and C++ code using Simulink® Coder™.

Slope-bias representation is not supported for fixed-point data types.

HDL Code Generation

Generate VHDL, Verilog and SystemVerilog code for FPGA and ASIC designs using HDL Coder™.

HDL Coder™ provides additional configuration options that affect HDL implementation and synthesized logic.

HDL Architecture

This block has one default HDL architecture.

HDL Block Properties

General
ConstrainedOutputPipeline	Number of registers to place at the outputs by moving existing delays within your design. Distributed pipelining does not redistribute these registers. The default is 0. For more details, see ConstrainedOutputPipeline (HDL Coder).
InputPipeline	Number of input pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is 0. For more details, see InputPipeline (HDL Coder).
OutputPipeline	Number of output pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is 0. For more details, see OutputPipeline (HDL Coder).

Restrictions

Supports fixed-point data types only.

Version History

Introduced in R2020b

R2023a: Smart unrolling for improved resource utilization

This block depends on a partial-systolic QR decomposition block. Since 23a, when you update the diagram, the loop which composes the partial-systolic pipeline in the QR decomposition block is unrolled. This updated internal architecture removes dead operations in simulation and generated code, thus requiring fewer hardware resources. This block simulates with clock and bit-true fidelity with respect to library versions of these blocks in previous releases.

R2022a: Support for Tikhonov regularization parameter

The Complex Partial-Systolic Matrix Solve Using Q-less QR Decomposition with Forgetting Factor block now supports the Tikhonov Regularization parameter.

R2021a: Reduced HDL resource utilization

This block now has an improved algorithm to reduce resource utilization on hardware-constrained target platforms.