photo

Dr. W. Kurt Dobson


Dobson Applied Technology Associates

Last seen: etwa ein Jahr vor |  Aktiv seit 2020

Followers: 0   Following: 0

Nachricht

IEEE Engineer of the Year - 1997/1998 65 U.S. Patents in Signal/Image Processing, artificial intelligence and wireless. Former VP Advanced Development, USRobotics

Statistik

  • First Answer
  • Thankful Level 1
  • First Review

Abzeichen anzeigen

Feeds

Anzeigen nach

Frage


Can Antenna Toolbox used to design 3d antenna geometries?
Need to design a 3d fractal antenna which would be 3d printed on the inside of a curved surface (a hemisphepre) with a dielectri...

mehr als ein Jahr vor | 0 Antworten | 0

0

Antworten

Frage


I'm using antenna toolbox. Can't add a dielectric layer without adding a ground plane
I am developing a fractal antenna. I just want a fractal pattern on a dielectric, like FR4. Don't want a reflector/groundplan...

mehr als ein Jahr vor | 1 Antwort | 0

1

Antwort

Frage


Parallel Matlab on EC2 or other supercomputer?
In around 2014, I was one of the beta testers for Matlab Parallel/Distributed computing on the Amazon EC2. I was developing tomo...

mehr als ein Jahr vor | 1 Antwort | 0

1

Antwort

Beantwortet
How can I write this with a for loop?
Looks like the index you are using starts with 3, then increments by 3 up to 210. Y looks like a matrix... So, let's say the i...

mehr als ein Jahr vor | 0

Frage


hdl coder hdl verifier: Error on Test Connection
I'm trying to run the Guided Hardware setup for HDL verifier, Xilinx Zedboard The 'Test Connection' button successfully complet...

mehr als ein Jahr vor | 1 Antwort | 0

1

Antwort

Frage


HDL Coder Guided Hardware Setup for HDL Verifier Support Package Xilinx
In the guided hardware setup, Setup SD Card Linux recognizes my 32gB SD card as /dev/sda ( I can see this in my file explore...

mehr als ein Jahr vor | 0 Antworten | 0

0

Antworten

Frage


HDL Coder FPGA In The Loop, Error: There is no current hw_target
Using HDL Coder for a matched filter. Everything works up until Verify with FPGA-in-the-Loop. I have a Zedboard attached with ...

mehr als ein Jahr vor | 1 Antwort | 0

1

Antwort

Frage


HDL Coder Example for ZedBoard
Hi, I'm coming up to speed with HDL Coder and I'm using the matlab workflow rather than Simulink. There's an example project f...

mehr als ein Jahr vor | 1 Antwort | 0

1

Antwort

Frage


Are the neural network training methods (like train(), or trainlm()) supported by codegen and App Compiler?
Are the neural network training methods (like train(), or trainlm()) supported by codegen and App Compiler? I have a project wh...

etwa 2 Jahre vor | 1 Antwort | 0

1

Antwort

Frage


TurboEncode OFDM Modulation with Pilot Tones
I am trying to implement turbo encoding on an OFDM modem. The problem is that I have pilot tones to support a Rx equalizer. I ...

mehr als 3 Jahre vor | 0 Antworten | 0

0

Antworten