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Bug related to using selector block with complex data type in HDL code generation
Hi, I am trying to generate HDL code for a subsystem with a selector block that selects between two complex inputs like the fol...
mehr als 2 Jahre vor | 1 Antwort | 0
1
AntwortFrage
How to initialize Dual rate Dual port ram?
The Simple Dual Port RAM System block gives to the option to initialize cells with pre-deined values. (Specify the RAM initial v...
mehr als 2 Jahre vor | 1 Antwort | 0
1
AntwortFrage
Checkpoint to save the state of Simulink simulation at a specific sample time
Hi, I'm working on a simulink design which is meant to work with a 108MHz (9.26ns) sample time. I need to simulate a long time ...
fast 3 Jahre vor | 1 Antwort | 0
1
AntwortFrage
Bias block not working properly with fixed point data type
Even though in the documentation of the bias block it supports fixed point types, it doesn't behave correctly when given a fixed...
fast 3 Jahre vor | 1 Antwort | 0
1
AntwortFrage
Give initial value to the "AXI4 Random Access Memory" block in simulink
I wanted to try out the newly introduced simulink block "AXI4 Random Access Memory". In my design I use the DDR3 simulation mode...
fast 3 Jahre vor | 1 Antwort | 0
1
AntwortFrage
How to solve Algebric loop error without adding delay.
Hi, I'm designing a DSP system in simulink with the purpose of using fixed-point and HDL coder tool-boxes to convert it into F...
mehr als 3 Jahre vor | 1 Antwort | 0
1
AntwortFrage
Simulink Fixed-Point tool false error
I am trying to use Fixed-Point tool's Iterative fixed-point conversion on my Simulink model but after the ranges are collected, ...
fast 4 Jahre vor | 1 Antwort | 0
1
AntwortFrage
How to specify the HDL Latency of Discrete FIR Filter block manually?
I have a simple simulink DSP model using HDL Coder library. The design captures a input signal and gives it to two Discrete FIR ...
mehr als 4 Jahre vor | 0 Antworten | 0
