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Problem in conversion from model to VHDL/Verilog HDL
HDL Coder will faithfully translate your Simulink design into VHDL or Verilog. The resulting HDL code is bit-true and cycle-accu...

mehr als 13 Jahre vor | 1

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hdlsetuptoolpath takes no effect on Windows
The *hdlsetuptoolpath* command does not modify the MATLAB path; it modifies the system path, and only inside the MATLAB session ...

mehr als 13 Jahre vor | 0

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how can I do to recognize hdlsetuptoolpath
The *hdlsetuptoolpath* utility was added to HDL Coder in R2011b. It is not part of either R2010a or R2010b. To gain access to t...

mehr als 13 Jahre vor | 1

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Is there any way to tell HDL Coder to produce less files?
Yes, there is. Identical atomic subsystems will only generate one module/entity that will be multiply instantiated. The subsys...

mehr als 13 Jahre vor | 4

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HDL Coder and HDL Verifier
I cannot answer question 1: I'm not familiar with the development boards. For question 2: HDL Coder's Workflow Advisor is int...

mehr als 13 Jahre vor | 2

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Illegal data access or computation detected for the chart given that 'Execute At Initialization' must be enabled
"Enable chart at entry" and "Execute at initialization" are two separate settings, both of which must be correctly set for HDL c...

mehr als 13 Jahre vor | 1

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"Data-type 'Fix_16_13' is unsupported for HDL code generation "
You need to find where you have specified "Fix_16_13" and correct the syntax. The string "Fix_16_13" is not a valid Simulink dat...

mehr als 13 Jahre vor | 1

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Simulink: HDL Coder support for Biquad filter block
I believe that support for coefficients as input ports on the Biquad Filter block was added in R2012a.

mehr als 13 Jahre vor | 3

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is it possible to generate hdl code for matlab s functions
No, this is not possible. The full set of blocks supported by HDL Coder, organized by Simulink library, are available via the ...

mehr als 13 Jahre vor | 3

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Simulations from an FPGA
HDL Verifier has FPGA-in-the-loop simulation capability that will do just what you are asking about. You will need to use one o...

mehr als 13 Jahre vor | 4

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Simulink HDL Coder Creating Verilog that Checks for Overflow Upon Addition of Two Int16s
You can prevent the emission of rounding and saturation code by the use of appropriate fimath parameters for the MATLAB Function...

mehr als 13 Jahre vor | 1

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"Abnormal exit: Downstream Integration: Unable to locate twr file"
The twr file is a timing file that is generated by the Xilinx tools. Can you find the tool in the Xilinx project directory under...

mehr als 13 Jahre vor | 0

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Errors in HDL conversion
This is a limitation of Simulink HDL Coder. You can not reasonably synthesize a device that takes a frame of data at a time as a...

mehr als 13 Jahre vor | 0

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HDL simulinks coder support
As Walter observed, floating point math will cause your argument to 'fix' to simply resolve to 'u', since fix(pi/3 + 1-e30) == 1...

fast 14 Jahre vor | 0

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HDL simulinks coder error
There's no information to respond to here. Sorry, but there's nothing useful I can add.

fast 14 Jahre vor | 0

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HDL simulinks coder about
Neither the *mod* function call nor the *sin* function call are supported for HDL Code Generation inside the MATLAB Function blo...

fast 14 Jahre vor | 1

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HDL flip flop generation
The Unit Delay block is the correct approach here. While the block supports the double data type, there is no requirement that ...

fast 14 Jahre vor | 0

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step to run model with co simulation block
The easiest mistake to make is not starting the 3rd-party simulator up through the Simulink diagram. In the cosimulation model ...

fast 14 Jahre vor | 0

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Problem with Generating VHDL Code of a Subsystem based on "Bus Creator", using HDL Coder 3.0
It appears that HDL Coder does not support nested busses, and is not reporting this gracefully to the user. I replaced your 2x9...

fast 14 Jahre vor | 0

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I want to see the hdl code generated using dsp builder in quartus 2 tool.
If you are using HDL Coder, the source code by default is located in a directory named 'hdlsrc', located under MATLAB's current ...

fast 14 Jahre vor | 0

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Simulink block to extract signal at index from vector signal doesn't exist?
The block you are looking for is the Multiport Switch block, located in the Simulink->Signal Routing library. This block is sup...

fast 14 Jahre vor | 0

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HDL Coder Not Working
Do you have MATLAB HDL Coder installed and licensed? In addition to its own license, MATLAB HDL Coder requires the installation...

fast 14 Jahre vor | 0

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Simulink to HDL
You will need to revamp your Simulink algorithm to not use matrices. This will often mean that you will need to decompose single...

fast 14 Jahre vor | 0

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How to integrate XilinxBlackBox in an HDL-Coder ISE Project ?
The difficulties that you are encountering have been addressed in the latest version of HDL Coder. HDL Coder 3.0, released with...

fast 14 Jahre vor | 0

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.m to HDL
The basic answer is that you need to have HDL Coder installed. With the recent release of R2012a, HDL Coder now supports HDL cod...

fast 14 Jahre vor | 0

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Image Processing .m Code to HDL CODE
You have made a pretty tall request here. The general answer is yes, you can do what you have proposed. You can use the MATLAB ...

fast 14 Jahre vor | 1

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unexpected compiler error on HDL Coder
The C/C++ compiler setting is not directly used by HDL Coder. The error message you are receiving can only be emitted when compi...

fast 14 Jahre vor | 0

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EDA Simulator link and Simulink Cosimulation
The rate to choose is your design decision. Somewhere in your design I suspect that you have a source (or multiple sources) run...

fast 14 Jahre vor | 0

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EDA Simulator link and Simulink Cosimulation
The error message is referring to the signal's rate, not its data type. You will need to change the rate of the Simulink signal...

fast 14 Jahre vor | 0

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Regarding HDL Code generation
Simulink HDL Coder can generate HDL for a supported set of Simulink blocks. While this list is fairly extensive, it does not in...

fast 14 Jahre vor | 1

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