CDSC PLL
The rapid deployment of renewable energy sources and power electronics based loads into power system leads to power quality degradation. To tackle this issue, the custom power devices are to be controlled with accurate and fast acting control algorithms. An accurate exttraction of grid voltage phase angle information is one of the features of superior control algorithms. The conventional SRF-PLL gives inaccurate phase angle during unbalanced and harmonic grid voltage conditions. Therefore, the accurate fundamental frequency components are initially extracted using dual second order generalized integrator (DSOGI) operator. Thereby, accurate phase and fundamental frequency informations are extracted by feeding DSOGI output to SRF-PLL.
It is observed that DSOGI based PLL gives an inaccurate phase angle "wt" in the presence of DC and highly distorted grid conditions which is common in Microgrid applications.
To make this process further improved, cascaded delayed signal cancellation (CDSC) operator is introduced.
For more information, refer the following paper.
N. Lokesh and M. K. Mishra, "A Comparative Performance Study of Advanced PLLs for Grid Synchronization," 2020 IEEE International Conference on Power Electronics, Smart Grid and Renewable Energy (PESGRE2020), Cochin, India, 2020, pp. 1-6. (doi: 10.1109/PESGRE45664.2020.9070288)
Zitieren als
Lokesh Nalla (2024). CDSC PLL (https://github.com/NallaLokeshReddy/Matlab-Simulink/releases/tag/1.0.1), GitHub. Abgerufen.
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CDSC based PLL
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Version | Veröffentlicht | Versionshinweise | |
---|---|---|---|
1.0.1 | See release notes for this release on GitHub: https://github.com/NallaLokeshReddy/Matlab-Simulink/releases/tag/1.0.1 |