how does the simulink design verifier creates test case
2 Ansichten (letzte 30 Tage)
Ältere Kommentare anzeigen
Ajay krishna Vasanthakumar
am 27 Jul. 2020
Kommentiert: Ajay krishna Vasanthakumar
am 31 Jul. 2020
Hello all,
how does the simulink design verifier generates test cases. does it generate the testcase for the given stop in the model to extend the coverage or it alters the stop time ?
Thanks in Advance
Ajay Krishna
0 Kommentare
Akzeptierte Antwort
Pat Canny
am 30 Jul. 2020
Hi Ajay,
There is an option to "extend" existing test cases with Simulink Design Verifier: https://www.mathworks.com/help/sldv/ug/when-to-extend-existing-test-cases.html
This is a common workflow for users who wish to leverage existing (often manually written) test cases. The test cases are extended in time from the stop time of the manually written test cases.
Otherwise, Simulink Design Verifier will create a new test case with a simulation start time of t=0 .
Hopefully this helps.
Thanks.
- Pat
Weitere Antworten (0)
Siehe auch
Kategorien
Mehr zu Generate Tests finden Sie in Help Center und File Exchange
Community Treasure Hunt
Find the treasures in MATLAB Central and discover how the community can help you!
Start Hunting!