Hi,
I have a large 1D array of an analogue signal which I would like to digitise to model a comparator with hysteresis. Once the analogue signal passes the high threshold the digital output should remain logic 1 until the analogue signal passes the low threshold and vica-versa.
To speed up processing I need to do the conversion without using a loop.
This example hopefully shows the problem:
ana=randn(1,100); % e.g. 0.70 0.27 0.49 -1.48 -1.02 -0.45 0.11 1.13 -0.29 1.26 0.48 1.17 0.13 -0.66
dig=0.5+zeros(size(ana)); % Create digital output variable, assign value as intermediate initially
dig(ana>=0.5)=1; dig(ana<=-0.5)=0; % Convert signals above or below a 0.5 threshold to logic 0 or 1
At this point we've found the logic levels when the signal is beyond the thresholds but now need to assign the intermediate values (between -0.5 and 0.5). Each run of these values must be set to the previous logic level e.g. :
The following 'dig' sequence:
[ 1 1 1 0.5 0.5 0.5 0 0 0.5 0.5 0.5 0 0.5 0 0 1 1]
Should become :
[ 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 1 1]
I'm sure there is an elegant answer the involves diff(dig) to identify the runs of 0.5 and a further diff to identify how many are in the sequence but am struggling to pin it down - any help appreciated!
