how can I make the input to HDL FIFO Scalar ?

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Esmail Abo-basha
Esmail Abo-basha am 13 Apr. 2014
Kommentiert: Esmail Abo-basha am 17 Apr. 2014
I have used the HDL FIFO block of dhldemolib in Simulink but when i start "Run compatibility check" to generate the VHDL code, an error appears which state that the HDL FIFO only supports a scalar input. how can I solve such a problem. i tried too many solutions but non of them works ??? any one can help me, please?

Antworten (1)

Tim McBrayer
Tim McBrayer am 14 Apr. 2014
The signal attached to the HDL FIFO's 'In' port must be a scalar; its dimensions must be static, a [1x1] matrix. To help you understand what your Simulink signal dimensions are, make sure the following settings are selected on your model:
Display>Signals & Ports>Signal Dimensions
Display>Signals & Ports>Wide Nonscalar Lines
The Display>Signals & Ports>Port Data Types setting can also be very useful in diagnosing type issues in Simulink.
  2 Kommentare
Esmail Abo-basha
Esmail Abo-basha am 15 Apr. 2014
Bearbeitet: Esmail Abo-basha am 15 Apr. 2014
the input to the input port of HDL FIFO is int8 and to the push and pop ports are boolean. i can't figure out what is wrong ??? how can i make int8 scalar ???
Esmail Abo-basha
Esmail Abo-basha am 17 Apr. 2014
please i need to know the answer
I have put two screen shots of my design on drop box and i wish if you can take a look at them. in the first screen shot https://www.dropbox.com/sh/4zq1e6hkxt9joh7/1Ce8sKNG6Q/Screenshot%202014-04-17%2011.03.34.png
the design report 3 errors state that the HDL FIFO accept only Scalat input data type
in the second photo i made a small modification as you can see https://www.dropbox.com/sh/4zq1e6hkxt9joh7/dotLTAT_-R/Screenshot%202014-04-17%2011.12.28.png
and the design reports no errors i can't figure out what is wrong with the first photo ?? i didn't change any data type i just separated between the two input !!!
i hope i don't waste your time and thank you very much for your help

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