This is machine translation
Translated by 
Mouseover text to see original. Click the button below to return to the English version of the page.
Note: This page has been translated by MathWorks. Click here to see
To view all translated materials including this page, select Country from the country navigator on the bottom of this page.
To view all translated materials including this page, select Country from the country navigator on the bottom of this page.
Hardware and Software Co-Design
Prototype algorithms on Zynq® device using HDL Coder™ and Embedded
Coder®
After you design and validate a pixel-streaming video processing algorithm in Simulink®, you can target the design to the FPGA on the Zynq board, and generate embedded ARM® code that interacts with the FPGA. You can route the video data to the ARM processor, and control AXI-Lite registers connected to the FPGA control logic.
Blocks
| Video Capture (software interface) | Capture video to ARM processor on a Zynq-based video system |
Classes
visionzynq | Connect to Zynq hardware |
Topics
Create Model Using Simulink Templates
Get started with a model configured for video processing
Video data path through the Zynq board
Target an FPGA on Zynq Hardware
FPGA targeting workflow using HDL Workflow Advisor
Target an ARM Processor on Zynq Hardware
Design and deploy algorithms to the ARM processor
Models Generated from FPGA Targeting
Run Simulink models that interact with the deployed algorithms running on the FPGA
