Modeling

Prepare model for hardware connection, add blocks to support hardware protocols

Blocks and simulation features for the Xilinx® Zynq® Platform.

Blocks

AXI4-Interface ReadRead data from IP core on Xilinx Zynq Platform
AXI4-Interface WriteWrite data to IP core on Xilinx Zynq Platform
Linux TaskSpawn task function as separate Linux thread
UDP ReceiveReceive UDP packet
UDP SendSend UDP message
VxWorks TaskSpawn task function as separate VxWorks thread
AXI4-Stream IIO WriteWrite AXI4-Stream Data using IIO
AXI4-Stream IIO ReadRead AXI4-Stream Data using IIO

Functions

zynqlibOpen the Simulink Library Browser to the Embedded Coder Support Package for Xilinx Zynq Platformblock library

Featured Examples