Inspect Test Generation Objectives by Using Model Slicer
This example shows how to use Model Slicer to inspect test generation objectives in a Simulink model. The Simulink Design Verifier analysis generates test cases and propagates the test cases to a Model block. You can see or inspect the values in the Model block at the time step at which the objective is observable and highlight the path and values using Model Slicer.
Prepare the Model
Open the model.
model = 'sldvdemo_cruise_control'; open_system(model);
Generate Test Objectives
1. Open Simulink Design Verifier by clicking on Apps > Design Verifier.
2. In the Design Verifier tab, click Generate Tests. Simulink Design Verifier analyzes the model and displays the results in Simulink Design Verifier Results Summary window.
3. In the model, the analysis highlights the
Controller subsystem where the objectives are located.
4. Open the
Controller subsystem and click the
PI Controller subsystem. Alternatively, you can select any of the blocks highlighted in green color. The objectives appear in the Results window.
Inspect Test Objectives using Model Slicer
1. In the Results window, click Inspect to launch Model Slicer and analyze the objective. Alternatively, in the Design Verifier tab, in Review Results section, click Review Results > Inspect Using Slicer.
As part of the model setup, Model Slicer:
Uses the selected block as a starting point
Highlights the slice that represents the objective
Simulates the model and pauses it at the time of observation
You can analyze the model by inspecting the port labels or observe the values of the test case propagated to the objective block and the path it takes.
Note that when you set the model coverage objective to enhanced MCDC, you can also inspect the objective detectability. In this case, the Model Slicer configuration allows you to switch to different modes by using the Slice Configuration list. For more information, see Inspect Enhanced MCDC Objectives using Model Slicer.