Main Content

Logical Operator Cascade Patterns

This example illustrates the criteria by which Simulink® Coverage™ identifies logical operator block cascades for the purpose of model coverage analysis for the modified condition/decision coverage (MCDC) metric.

Open the Model

The example model contains patterns of Logical Operator block cascades.

When you analyze a model for modified condition/decision coverage (MCDC), Simulink Coverage searches for cascades of Logical Operator blocks. A logic cascade occurs when there are Logical Operator blocks downstream of other Logical Operator blocks. When Simulink Coverage identifies a logic cascade, it analyzes the overall expression represented by the combination of blocks instead of analyzing each block individually. If a Logical Operator block is not part of a logic cascade, then you only receive MCDC results for the individual block.

Logical Operator blocks only receive MCDC as part of a logic cascade when all of these conditions are true:

  • The block input and output signals are all scalar.

  • The block operation is not XOR/NXOR

  • The block has more than one input signal (unless its operation is NOT)

  • The input signal does not branch to another non-virtual block

Simulate the model by clicking Run (Coverage). When the simulation completes, the Coverage Details pane opens.

View the First Cascade

Click the And block named And_Block.

The coverage report displays three conditions. Each condition has two possible outcomes, and one outcome is satisfied. However, the coverage report does not display MCDC data for And_Block because And_Block is part of a logic cascade. Instead, the MCDC line in the report links to the block that represents the root of the logic cascade, Not_Block. Click the link see Not_Block.

The coverage report for Not_Block displays one condition with two possible outcomes. This MCDC table displays the coverage results for the combined output of the logic cascade of And_Block and Not_Block. And_Block represents the logical operation C1 && C2 && C3 where each input is a Boolean value. Because Not_Block negates And_Block, Simulink Coverage analyzes the overall expression ~(C1 && C2 && C3) in the MCDC table. Because only one condition outcome occurred during the simulation, there are no satisfied MCDC outcomes for this cascade.

View the Second Cascade

Click the Logical Operator block named Nor_Block.

Similar to And_Block, the coverage report displays the condition table with one satisfied outcome for Nor_Block, but does not display an MCDC analysis table. The MCDC line of the report links to Masked_AND_Block, which is inside the subsystem named Masked Subsystem. In the model, click Masked Subsystem.

The second cascade is separate from the first cascade because the output signal of the first cascade which is also the input signal to the second cascade branches. If the signal branches only to a virtual block, then the MCDC cascade continues uninterrupted. If the signal branches to a non-virtual block, then Simulink Coverage treats the logic as two separate logical cascades.

Masked Subsystem is a subsystem that contains the Logical Operator block named Masked_AND_Block. The first input to the subsystem is a virtual connection to the output of Nor_Block. Nor_Block represents the logical expression ~(C1 | C2), and the Masked_AND_Block combines the output of that expression with a third Boolean value, C3, giving a cascaded logical expression of ~(C1 | C2) && C3. The MCDC table also displays the expression that represents the cascaded logic.

Unsupported Logical Operations

In the top-level model, click the Logical Operator block named Or_Block.

The coverage report displays the condition table and the MCDC table for this block. Click XOR_Block.

The coverage report displays the MCDC analysis tables for both blocks here because cascaded MCDC analysis does not support the XOR and NXOR operations. As a result, Simulink Coverage analyzes the MCDC for these blocks individually.

Click the Logical Operator block named Vector_AND_Block to see that the report for this block also contains an MCDC analysis table because cascaded MCDC analysis does not support vector inputs.

See Also

| |

Related Topics