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Getting Started with HDL Verifier


Design Verification Automation

  • HDL Cosimulation

    The HDL Verifier software consists of MATLAB functions, a MATLAB System object™, and a library of Simulink blocks, all of which establish communication links between the HDL simulator and MATLAB or Simulink.

  • FPGA Verification

    HDL Verifier works with Simulink or MATLAB and HDL Coder™ and the supported FPGA development environment to prepare your automatically generated HDL code for implementation in an FPGA.

  • TLM Component Generation

    HDL Verifier lets you create a SystemC Transaction Level Model (TLM) that can be executed in any OSCI-compatible TLM 2.0 environment, including a commercial virtual platform.

  • SystemVerilog DPI Component Generation

    HDL Verifier works with Simulink Coder™ or MATLAB Coder to export a subsystem as generated C code inside a SystemVerilog component with a Direct Programming Interface (DPI).

Featured Examples