configureADCThresholdSettings
Syntax
Description
Add-On Required: This feature requires the HDL Coder Support Package for AMD FPGA and SoC Devices add-on.
configureADCThresholdSettings(
configures the threshold modes and values for analog-to-digital converters (ADCs) while the
design is running on the SoC device. Use this function to enable the threshold monitoring
circuit, which compares the ADC sampled data with the specified threshold values.rfDataConverter,tileId,channelId,threshold1Mode,threshold2Mode,threshold1,threshold2)
configureADCThresholdSettings(
configures the threshold settings for ADCs with arguments that specify the number of samples
below the threshold value.rfDataConverter,tileId,channelId,threshold1Mode,threshold2Mode,threshold1,threshold2,numSamplesBelowThreshold1,numSamplesBelowThreshold2)
Input Arguments
Version History
Introduced in R2022b
See Also
Blocks
- RF Data Converter (SoC Blockset)
Functions
configureADCTile|configureADCChannel|configureADCTileClock|configureADCMixer|configureADCLocalOscillator|applyNyquistZone|applyCalibrationMode