Generate HDL and HLS Code from a Histogram Equalization Algorithm

R2026b

This example shows how to generate HDL and HLS code from a MATLAB^® function that implements image enhancement by histogram equalization.

Histogram equalization is a technique for adjusting image contrast. The algorithm transforms pixel intensity values so that the histogram of the output image is approximately uniform. This transformation increases the global contrast of the image. This technique is useful for images with backgrounds and foregrounds that are both bright or both dark.

Examine the MATLAB Design and Test Bench

Set up the MATLAB function and test bench for this example. In the MATLAB Command Window, enter:

mlhdlc_demo_setup("mlhdlc_heq");

This command opens a temporary working folder with the files that you need to run this example. The folder includes these files:

• MATLAB function

• Test bench

• <model>_runme.m script, which includes the commands to generate HDL code

• <model>_runme_hls.m script, which includes the commands to generate HLS code

The MATLAB function, mlhdlc_heq, accepts pixel coordinates, pixel intensity, and frame dimensions as inputs. It processes one pixel per call in a streaming fashion, accumulating a histogram during the active frame. During the vertical blanking interval, it computes the cumulative distribution (transfer function). The function outputs the equalized pixel intensity along with the pass-through coordinates.

To view the function, enter:

open mlhdlc_heq.m;

The test bench file, mlhdlc_heq_tb, verifies the behavior of the MATLAB function. It reads an image, streams pixels through the design over two frames with horizontal and vertical blanking, and displays the original and equalized images alongside their histograms. To view the test bench, enter:

open mlhdlc_heq_tb;

Simulate the Design

To check for run-time errors, simulate the design by running the test bench. In the MATLAB Command Window, enter:

mlhdlc_heq_tb

working on frame: 1
working on frame: 2

Generate HDL Code

The mlhdlc_heq_runme script specifies the target files, enables the settings required for this example, and generates HDL code.

The script specifies the MATLAB function and test bench, then creates a fixed-point configuration object and an HDL configuration object by using the coder.config function. It associates the test bench with both configuration objects.

designName = "mlhdlc_heq";
designTB = "mlhdlc_heq_tb";
fixptCfg = coder.config("fixpt");
fixptCfg.TestBenchName = designTB;
cfg = coder.config("hdl");
cfg.TestBenchName = designTB;

The script then generates code:

codegen("-float2fixed", "fixptCfg", "-config", "cfg", designName, ...
"-launchreport");

Run the Script

First, modify the mlhdlc_heq_runme script. The script disables synthesis by default. Set the value for the SynthesizeGeneratedCode property to true:

cfg.SynthesizeGeneratedCode = true;

Update the settings for your synthesis tool:

cfg.SynthesisTool = "Xilinx Vivado";
cfg.SynthesisToolChipFamily = "Artix7";
cfg.SynthesisToolDeviceName = "xa7a100t";
cfg.SynthesisToolPackageName = "csg324";
cfg.SynthesisToolSpeedValue = "-1I";

Then, generate code by running the script:

mlhdlc_heq_runme

After code generation completes, the report opens. Examine the generated HDL code in the report.

Generate HLS Code

The mlhdlc_heq_runme_hls script specifies the target files, enables the settings required for this example, and generates HLS code.

The script specifies the MATLAB function and test bench, then creates a fixed-point configuration object by using the coder.config function. It associates the test bench with the configuration object.

designName = "mlhdlc_heq";
designTB = "mlhdlc_heq_tb";
fixptCfg = coder.config("fixpt");
fixptCfg.TestBenchName = designTB;

The script creates an HLS configuration object by using the coder.config function, associates the test bench, and enables simulation.

cfg = coder.config("hls");
cfg.TestBenchName = designTB;
cfg.GenerateHLSTestBench = true;
cfg.SimulateGeneratedCode = true;

The script then generates code:

codegen("-float2fixed", "fixptCfg", "-config", "cfg", designName, ...
"-launchreport");

Run the Script

First, modify the mlhdlc_heq_runme_hls script. The script disables synthesis by default. Set the value for the SynthesizeGeneratedCode property to true:

cfg.SynthesizeGeneratedCode = true;

Depending on your synthesis tool, set one of these flags to true:

isCodingForStratusHLS = false;
isCodingForVitisHLS = true;

Depending on your synthesis tool, update these synthesis tool settings:

if isCodingForStratusHLS
    cfg.SynthesisTool = "Cadence Stratus HLS";
elseif isCodingForVitisHLS
    cfg.SynthesisTool = "Xilinx Vitis HLS";
    cfg.SynthesisToolChipFamily = "Artix7";
    cfg.SynthesisToolDeviceName = "xa7a100t";
    cfg.SynthesisToolPackageName = "csg324";
    cfg.SynthesisToolSpeedValue = "-1I";
end

Then, generate code by running the script:

mlhdlc_heq_runme_hls

After code generation completes, the report opens. Examine the generated HLS code in the report.