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Control Cast Expressions in Generated Code

You can choose how the code generator specifies data type casts in the generated code. In the Configuration Parameters dialog box, select Code Generation > Code Style. From the Casting modes drop-down list, three parameter options control how the code generator casts data types.

  • Nominal instructs the code generator to generate code that has minimal data type casting. When you do not have special data type information requirements, choose Nominal.

  • Standards Compliant instructs the code generator to cast data types to conform to MISRA® standards when it generates code. The MISRA data type casting eliminates common MISRA standard violations, including address arithmetic and assignment. It reduces 10.1, 10.2, 10.3, and 10.4 violations.

    For more information, see MISRA C Guidelines.

  • Explicit instructs the code generator to cast data type values explicitly when it generates code. You can see how a value is stored, which tells you how much memory space the code uses for the variable. The data type informs you how much precision is possible in calculations involving the variable.

Open the example model rtwdemo_rtwecintro.

Enable Nominal Casting Mode and Generate Code

When you choose Nominal casting mode, the code generator does not create data type casts for variables in the generated code.

  1. On the Code Generation > Code Style pane, from the Casting modes drop-down list, select Nominal.

  2. On the Code Generation > Report pane, select Create code generation report.

  3. On the Code Generation pane, select Generate code only.

  4. Click Apply.

  5. In the model window, press Ctrl+B to generate code.

  6. In the Code Generation report left pane, click rtwdemo_rtwecintro.c to see the code.

/* Model step function */
void rtwdemo_rtwecintro_step(void)
{
  boolean_T rtb_equal_to_count;

  /* Sum: 'XRootX/Sum' incorporates:
   *  Constant: 'XRootX/INC'
   *  UnitDelay: 'XRootX/X'
   */
  rtDWork.X++;

  /* RelationalOperator: 'XRootX/RelOpt' incorporates:
   *  Constant: 'XRootX/LIMIT'
   */
  rtb_equal_to_count = (rtDWork.X != 16);

  /* Outputs for Triggered SubSystem: 'XRootX/Amplifier' incorporates:
   *  TriggerPort: 'XS1X/Trigger'
   */
  if (rtb_equal_to_count && (rtPrevZCSigState.Amplifier_Trig_ZCE != POS_ZCSIG))
  {
    /* Outport: 'XRootX/Output' incorporates:
     *  Gain: 'XS1X/Gain'
     *  Inport: 'XRootX/Input'
     */
    rtY.Output = rtU.Input << 1;
  }

  rtPrevZCSigState.Amplifier_Trig_ZCE = (uint8_T)(rtb_equal_to_count ? (int32_T)
    POS_ZCSIG : (int32_T)ZERO_ZCSIG);

  /* End of Outputs for SubSystem: 'XRootX/Amplifier' */

  /* Switch: 'XRootX/Switch' */
  if (!rtb_equal_to_count) {
    /* Update for UnitDelay: 'XRootX/X' incorporates:
     *  Constant: 'XRootX/RESET'
     */
    rtDWork.X = 0U;
  }
	
  /* End of Switch: 'XRootX/Switch' */
}

Enable Standards Compliant Casting Mode and Generate Code

When you choose Standards Compliant casting mode, the code generator creates MISRA standards compliant data type casts for variables in the generated code.

  1. On the Code Style pane, from the Casting modes drop-down list, select Standards Compliant.

  2. On the Code Generation pane, click Apply.

  3. In the model window, press Ctrl+B to generate code.

  4. In the Code Generation report left pane, click rtwdemo_rtwecintro.c to see the code.

void rtwdemo_rtwecintro_step(void)
{
  boolean_T rtb_equal_to_count;
	
  /* Sum: '<Root>/Sum' incorporates:
   *  Constant: '<Root>/INC'
   *  UnitDelay: '<Root>/X'
   */
  rtDWork.X++;

  /* RelationalOperator: '<Root>/RelOpt' incorporates:
   *  Constant: '<Root>/LIMIT'
   */
  rtb_equal_to_count = (boolean_T)(int32_T)((int32_T)rtDWork.X != (int32_T)16);

  /* Outputs for Triggered SubSystem: '<Root>/Amplifier' incorporates:
   *  TriggerPort: '<S1>/Trigger'
   */
  if (((int32_T)rtb_equal_to_count) && (rtPrevZCSigState.Amplifier_Trig_ZCE !=
       POS_ZCSIG)) {
    /* Outport: '<Root>/Output' incorporates:
     *  Gain: '<S1>/Gain'
     *  Inport: '<Root>/Input'
     */
    rtY.Output = (int32_T)(uint32_T)((uint32_T)rtU.Input << (uint32_T)(int8_T)1);
  }

  rtPrevZCSigState.Amplifier_Trig_ZCE = (uint8_T)(int32_T)(rtb_equal_to_count ?
    (int32_T)(uint8_T)POS_ZCSIG : (int32_T)(uint8_T)ZERO_ZCSIG);

  /* End of Outputs for SubSystem: '<Root>/Amplifier' */

  /* Switch: '<Root>/Switch' */
  if (!rtb_equal_to_count) {
    /* Update for UnitDelay: '<Root>/X' incorporates:
     *  Constant: '<Root>/RESET'
     */
    rtDWork.X = 0U;
  }

  /* End of Switch: '<Root>/Switch' */
}

Enable Explicit Casting Mode and Generate Code

When you choose Explicit casting mode, the code generator creates explicit data type casts for variables in the generated code.

  1. On the Code Style pane, from the Casting modes drop-down list, select Explicit.

  2. On the Code Generation pane, click Apply.

  3. In the model window, press Ctrl+B to generate code.

  4. In the Code Generation report left pane, click rtwdemo_rtwecintro.c to see the code.

/* Model step function */
void rtwdemo_rtwecintro_step(void)
{
  boolean_T rtb_equal_to_count;

  /* Sum: '<Root>/Sum' incorporates:
   *  Constant: '<Root>/INC'
   *  UnitDelay: '<Root>/X'
   */
  rtDWork.X = (uint8_T)(1U + (uint32_T)(int32_T)rtDWork.X);

  /* RelationalOperator: '<Root>/RelOpt' incorporates:
   *  Constant: '<Root>/LIMIT'
   */
  rtb_equal_to_count = (boolean_T)((int32_T)rtDWork.X != 16);

  /* Outputs for Triggered SubSystem: '<Root>/Amplifier' incorporates:
   *  TriggerPort: '<S1>/Trigger'
   */
  if (((int32_T)rtb_equal_to_count) && ((int32_T)((int32_T)
        rtPrevZCSigState.Amplifier_Trig_ZCE != (int32_T)POS_ZCSIG))) {
    /* Outport: '<Root>/Output' incorporates:
     *  Gain: '<S1>/Gain'
     *  Inport: '<Root>/Input'
     */
    rtY.Output = rtU.Input << 1;
  }

  rtPrevZCSigState.Amplifier_Trig_ZCE = (uint8_T)(rtb_equal_to_count ? (int32_T)
	    POS_ZCSIG : (int32_T)ZERO_ZCSIG);

  /* End of Outputs for SubSystem: '<Root>/Amplifier' */

  /* Switch: '<Root>/Switch' */
  if (!(int32_T)rtb_equal_to_count) {
    /* Update for UnitDelay: '<Root>/X' incorporates:
     *  Constant: '<Root>/RESET'
     */
    rtDWork.X = 0U;
  }
	
  /* End of Switch: '<Root>/Switch' */
}

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