Designing a CIC filter for an FPGA – Efficient Fixed-Point I
In Simulink, you can design signal processing algorithms such as IIR filters, CIC filters etc. In this example, we show how you can take a CIC filter design in Fixed-point and convert it to an optimal fixed-point model that is efficient with respect to the resource utilization on an FPGA.
The data type optimization feature in Fixed Point Designer:
• Automatically iterates and chooses the smallest heterogeneous data types for your system under design while meeting behavioral constraints
• Optimizes bit width by choosing smallest data types that can meet the user specified tolerances for quantization noise
The download contains a CIC filter using 32 bit Fixed point data types and a script that uses data type optimization to convert it to an optimal fixed-point design. We have also included the optimal solution model which you get as the output of the optimization along with the resource utilization metrics from the Vivado toolchain.
Please refer to the following documentation link to learn more about this feature:
Data type optimization: http://www.mathworks.com/help/fixedpoint/ref/fxpopt.html
https://www.youtube.com/watch?v=nkZAB7LIRXI
Zitieren als
MathWorks Fixed Point Team (2024). Designing a CIC filter for an FPGA – Efficient Fixed-Point I (https://www.mathworks.com/matlabcentral/fileexchange/66679-designing-a-cic-filter-for-an-fpga-efficient-fixed-point-i), MATLAB Central File Exchange. Abgerufen.
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- Code Generation > HDL Coder > HDL Code Generation from Simulink > Speed and Area Optimization > Optimization Basics >
- FPGA, ASIC, and SoC Development > HDL Coder > HDL Code Generation from Simulink > Speed and Area Optimization > Optimization Basics >
- FPGA, ASIC, and SoC Development >
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