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Effect of Unit Delay Block on Linked Models

Asked by najusten on 19 May 2019
Latest activity Commented on by Raj
on 22 May 2019
Hello,
I am currently working on a Simulink code for a school related project - the model itself is fairly extensive at this point and contains multiple feedback loops - it essentially consists of three coupled models, a single track vehicle model as well as tire model for the combined front and rear tires. When I ran the model after some extensive debugging, I received the following error message along with several additional error messages which point to algebraic loop errors in the vehicle model block:
Cannot solve algebraic loop involving 'Model Name' because it consists of blocks that cannot be assigned algebraic variables, such as blocks with discrete-valued outputs, blocks with non-double or complex outputs, Stateflow blocks, or nonvirtual subsystems. Consider breaking the algebraic loop. For example, add a delay or a memory block to the loop.
I have not found any direct feedback loops which could cause this error, but thought it might stem from the fact at the first timestep, the feedback loop has not been completed, and thus calculations in the vehicle model which rely on outputs from the tire model, for instance, cannot be computed yet.
Next, I added a unit delay block - when I place a unit delay block in one of the feedbacks the model runs, but the results are incorrect and not what I would expect. The system seems increasingly unstable as unit delays are added to the feedback loops. Furthermore, the results naturally depend on the location of the unit delay in the model. I figured the reason the results deviate from what I would expect is that you are essentially holding the input signal to a certain subsystem by onestep every timestep. Meaning that calculations in this model always essentially lag one iteration behind and could lead to unexpected results.
Is this the correct reasoning? Is there something else I might try instead of a unit delay? Any advice on how to proceed would be greatly appreciated.
Cheers!

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1 Answer

Answer by Raj
on 20 May 2019

You are right about the part that use of unit delay block has caused unexpected results. I have faces similar problems while designing flight control systems with closed feedback loops. Usually you will have to go back to your model and do some modifications to adapt it to the unit delay effect. For example in my case we had to retune the controller gains a bit and that worked.Use of Memory block is not usually recommended. See the accepted answer here.
Also go through the link posted in the accepted answer which explains why use of memory block is not recommended and a way around. Hope this helps!!

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Hi Raj, thanks for your reply! Definitely led me to some good resources; I appreciate your feedback. So I don't have a PID controller in my model that I can tune to negate the effects introduced by the unit delay/memory block, but I did check the box that states "minimize algebraic loop occurrences" under the block parameters of two subsystems. Do you know what exactly this option does? Is it essentially the same as a unit delay?
After selecting this option I was able to remove all unit delay blocks from my model - the output is still not what I would expect, and I'm not quite sure what dynamic effect this option has..
Raj
on 22 May 2019
You are welcome. Without looking in detail at the model and data. its difficult to comment why you are not getting the desired result. So I leave that debugging part to you.
Regarding the second part, I recommend to see the section on "How the Algebraic Loop Solver Works" here.

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