This support package helps you design an algorithm targeted for the ARM® processor on the Zynq® board. Use this support package and Simulink® targeting tools to deploy the algorithm to the hardware and run it in external mode or full deployment. Your algorithm can interact with the design loaded to the FPGA through AXI-Lite registers and by routing the video data to the ARM processor.
Create a model for software targeting using the default FPGA design loaded at setup, or customize the FPGA logic and use the generated software interface model. In either case, you can use the Video Capture (software interface) block to route the video from the FPGA into the ARM processor, and to control the data path in the FPGA.
To generate and deploy code to the ARM processor, these products are required:
Embedded Coder Support Package for Xilinx® Zynq Platform
During simulation, you can adjust the following parameters:
Bypass FPGA user logic on the Video Capture (software interface) block
Any control ports in the FPGA user logic
You can create a model for software targeting using the default FPGA design loaded at setup. You can also customize the FPGA logic and use targeted software to interface with your FPGA design (see Models Generated from FPGA Targeting). Use the Video Capture (software interface) block to route the video data into the ARM processor. When you use the default FPGA design, you can change the video parameters on the block to configure the format of the imported frames. In the generated software interface model, the pixel format parameters are locked to match the video format in the FPGA. The generated model also includes a Xilinx Zynq AXI Interface block, with ports to read and write the AXI-Lite registers on the FPGA.
To view the modified video in Simulink, use the Video Viewer block in external mode.
From the Tools menu, select Run on Target Hardware. Then, select either Prepare to Run or Options.
In the Configuration Parameters dialog box, select the Hardware Implementation pane.
Set Hardware board to
Zynq-7000 based board. This selection works with
all supported boards.
Review the other parameters on this pane but do not change anything. The IP address for external mode is determined automatically.
To run your algorithm on the ARM processor, use one of these options:
External mode — Connect your Simulink model to your generated code running on the target processor and FPGA. The model becomes an interface to the real-time application. By changing parameters in the Simulink model, you also change parameters in the real-time application. In designs that use the generated software interface model, you can control AXI-Lite inputs to the FPGA user logic. With the Video Capture (software interface) block, you can change the camera data source, and whether the FPGA user logic is enabled.
Full deployment — Run your generated code on standalone hardware, without a connection to Simulink.
In your model, set the simulation stop time to
run the simulation until you explicitly pause or stop the model.
If your model includes the Video Viewer block, to avoid buffering errors, reduce the duration of the external mode trigger. In the Code menu, select External Mode Control Panel. Click Signal & Triggering, then in the Trigger options section, set Duration to 1.
In the Simulink toolbar, set Simulation
External. Then, click Run.
The model is now running on the target hardware. You can see the messages coming from the model running on the target hardware in the Diagnostic Viewer.
Change any tunable parameters and observe the changes in the HDMI output from your hardware. See Tunable Parameters.
After observing the simulation, click Stop. The Diagnostic Viewer indicates that the model has stopped running. Close the viewer.
In the Simulink toolbar, click Deploy to Hardware .
The model is now running on the external hardware. The system command window that opens shows the messages coming from the model running on the target hardware. The video that is output from your board appears on your HDMI output. If your generated code included inputs from dip switches or push buttons on the board, use them to modify the operation of your system. Then observe the change in output.
Deploying a new or updated model on the board:
Automatically stops a running model with the same name.
Does not stop running models that have other names.