C28x SPI Receive
Receive data through Serial Peripheral Interface (SPI) on target
- Library:
Embedded Coder Support Package for Texas Instruments C2000 Processors / C2802x
Embedded Coder Support Package for Texas Instruments C2000 Processors / C2803x
Embedded Coder Support Package for Texas Instruments C2000 Processors / C2805x
Embedded Coder Support Package for Texas Instruments C2000 Processors / C2806x
Embedded Coder Support Package for Texas Instruments C2000 Processors / C280x
Embedded Coder Support Package for Texas Instruments C2000 Processors / C281x
Embedded Coder Support Package for Texas Instruments C2000 Processors / C2833x
Embedded Coder Support Package for Texas Instruments C2000 Processors / C2834x
Embedded Coder Support Package for Texas Instruments C2000 Processors / F2807x
Embedded Coder Support Package for Texas Instruments C2000 Processors / F2837xD
Embedded Coder Support Package for Texas Instruments C2000 Processors / F2837xS
Embedded Coder Support Package for Texas Instruments C2000 Processors / F2838x/ C28x
Embedded Coder Support Package for Texas Instruments C2000 Processors / F28004x
Embedded Coder Support Package for Texas Instruments C2000 Processors / F28002x
Embedded Coder Support Package for Texas Instruments C2000 Processors / F28003x
Embedded Coder Support Package for Texas Instruments C2000 Processors / F28M35x / C28x
Embedded Coder Support Package for Texas Instruments C2000 Processors / F28M36x / C28x
Description
The SPI Receive block supports synchronous, serial peripheral input/output port communications between the processor and external peripherals or other controllers. The block can run in either slave or master mode. In master mode, the SPISIMO pin transmits data, and the SPISOMI pin receives the data. When master mode is selected, the SPI initiates the data transfer by sending a serial clock signal (SPICLK), which is used for the entire serial communications link. Data transfers are synchronized to this SPICLK, which enables both master and slave to send and receive data simultaneously. The maximum frequency for the clock is one quarter of the processor clock frequency.
The SPI device receives data and places the data in the receive buffer. The SPI Receive block reads the data from the receive buffer. In master mode, the C28x SPI Transmit block initiates SPI transmission by writing data to the transmit buffer. Then, the data received in the receive buffer is read by the SPI Receive block. In slave mode, the SPI Receive block is used to read the data in the receive buffer, which is received from the master. Then, the data is written into the transmit buffer using the SPI Transmit block. From the transmit buffer, the data is sent to the master.
Configure the SPI modules for a specific hardware board by navigating to Hardware Implementation > Target hardware resources. Verify that these settings meet the requirements of your application.
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Output
Parameters
Model Examples
Version History
Introduced in R2017b