System object: hdlverifier.FPGADataReader
Configure operator that compares individual signal values within trigger condition
DC— Customized data capture object
Customized data capture object created using the FPGA Data Capture Component Generator app.
name— Name of trigger component signal
Name of a trigger component signal, specified as a character vector. This
name must match one of the signal names configured on creation of the System
object specified as
DC. The signal must be configured as
a possible trigger signal.
operator— Operator to compare signals within trigger condition
Operator to compare signals within the trigger condition, specified as one
of these operators:
The trigger condition comprises value comparisons of one or more signals.
For a multibit signal, specify one of these operators:
>=. For a Boolean signal, specify one of these operators:
!=. For details on trigger
conditions, see Triggers.